HD6475328-CP10 Datasheet, PDF (97/459 Pages) Hitachi Semiconductor – original Hitachi CMOS microcomputer unit (MCU)

3.9 Programming Notes
3.9.1 Restriction on Address Location
The following restriction applies when instructions are located in on-chip RAM.
• Restriction
Instruction execution cannot proceed continuously from an external address to on-chip RAM in
the ZTAT versions. This restriction does not apply to versions with masked ROM.
• Solution
To execute instructions located in on-chip RAM, use a branch instruction (examples: Bcc, JMP,
etc.) to branch to the first instruction located in on-chip RAM. Do not place instruction code in
the last three bytes of external memory (H'FB7D to H'FB7F).
H'FB7A
H'FB7B
H'FB7C
H'FB7D
H'FB7E
H'FB7F
H'FB80
H'FB81
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
H'FB7A
H'FB7B
H'FB7C
H'FB7D
H'FB7E
H'FB7F
Not
executable H'FB80
H'FB81
NOP
BRA
disp
NOP
NOP
Do not
place
instruction
code here
Branch
Execution Disabled
Execution Enabled
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