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HD6475328-CP10 Datasheet, PDF (65/459 Pages) Hitachi Semiconductor – original Hitachi CMOS microcomputer unit (MCU)
Table 3-7 Addressing Modes
No. Addressing Mode Mnemonic
EA Field
EA Extension
1
Register direct
Rn
1 0 1 0 Sz r r r
*1 *2
None
2
Register indirect
@Rn
1 1 0 1 Sz r r r
None
3
Register indirect
@(d:8,Rn)
1 1 1 0 Sz r r r
with displacement
@(d:16,Rn)
1 1 1 1 Sz r r r
Displacement (1 byte)
Displacement (2 bytes)
4
Register indirect
@–Rn
with pre-decrement
Register indirect
@Rn+
with post-increment
1 0 1 1 Sz r r r
1 1 0 0 Sz r r r
None
5
Immediate
#xx:8
00000100
Immediate data (1 byte)
#xx:16
00001100
Immediate data (2 bytes)
6
Absolute *3
@aa:8
@aa:16
0 0 0 0 Sz 1 0 1
0 0 0 1 Sz 1 0 1
1-Byte absolute address
(offset from BR)
2-Byte absolute address
7
PC-relative
disp
No EA field.
1- or 2-byte displacement
Addressing mode
is specified in the
operation code.
Notes: * 1 Sz: Specifies the operand size.
When Sz = 0: byte operand
When Sz = 1: word operand
* 2 rrr: Register number field, specifying a general register number.
0 0 0 — R0 0 0 1 — R1 0 1 0 — R2 0 1 1 — R3
1 0 0 — R4 1 0 1 — R5 1 1 0 — R6 1 1 1 — R7
* 3 The @aa:8 addressing mode is also referred to as the short absolute addressing mode.
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