HD6475328-CP10 Datasheet, PDF (166/459 Pages) Hitachi Semiconductor – original Hitachi CMOS microcomputer unit (MCU)

9.3.2 Port 2 Registers
Register Configuration: Table 9-5 lists the registers of port 2.
Table 9-5 Port 2 Registers
Name
Port 2 data direction register
Port 2 data register
Abbreviation
P2DDR
P2DR
Read/Write
W
R/W
Initial Value
H'E0
H'E0
Address
H'FF81
H'FF83
1. Port 2 Data Direction Register (P2DDR)—H'FF81
Bit
7
6
5
4
3
2
1
0
—
—
— P24DDR P23DDR P22DDR P21DDR P20DDR
Initial value
1
1
1
0
0
0
0
0
Read/Write
—
—
—
W
W
W
W
W
P2DDR is an 8-bit register that selects the direction of each pin in port 2.
Single-Chip Mode: A pin functions as an output pin if the corresponding bit in P2DDR is set
to “1,” and as an input pin if the bit is cleared to “0.”
Bits 4 to 0 can be written but not read. An attempt to read this register does not cause an error, but
all bits are read as “1,” regardless of their true values.
Bits 7 to 5 are reserved. They cannot be modified and are always read as “1.”
At a reset and in the hardware standby mode, P2DDR is initialized to H'E0, making all five pins
input pins. P2DDR is not initialized in the software standby mode, so if a P2DDR bit is set to “1”
when the chip enters the software standby mode, the corresponding pin continues to output the
value in the port 2 data register.
Expanded Modes: All bits of P2DDR are fixed at “1” and cannot be modified.
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