HD6475328-CP10 Datasheet, PDF (375/459 Pages) Hitachi Semiconductor – original Hitachi CMOS microcomputer unit (MCU)

Table A-7 Instruction Execution Cycles (6)
Instruction
TRAPA
TRAP/VS
UNLK
PJMP
PJSR
PRTS
PRTD
(Condition)
Minimum mode
Maximum mode
V = 0, trap not taken
V = 1, trap taken, minimum mode
V = 1, trap taken, maximum mode
@aa:24
@Rn
@aa:24
@Rn
#xx:8
#xx:16
Execution Cycles
17
22
3
18
23
5
9
8
15
13
12
13
13
I
J+K
6
4
10
4
1
6
4
10
4
2
1
6
5
4
6
4
5
4
5
4
5
4
6
Table A-8 (a) Adjusted Value (Branch Instruction)
Instruction
BSR, JMP, JSR, RTS, RTD, RTE
TRAPA, PJMP, PJSR, PRTS, PRTD
Bcc, SCB, TRAP/VS (When branches)
Address
even
odd
even
odd
Adjusted Value
0
1
0
1
Table A-8 (b) Adjusted Value (Other Instructions by Addressing Modes)
Instruction
MOV.B #xx:8, <EA>
MOVTPE, MOVFPE
MOV.W #xx:16, <EA>
Instruction other than above
Start
address
even
odd
even
odd
even
odd
1
1
11
1
11
1
1
11
1
11
2
0
22
2
02
0
2
00
0
20
01
0
11
1
01
0
0
00
1
00
0
10
0
0
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