HD6475328-CP10 Datasheet, PDF (374/459 Pages) Hitachi Semiconductor – original Hitachi CMOS microcomputer unit (MCU)

Table A-7 Instruction Execution Cycles (5)
Instruction
Bcc d:8
Bcc d:16
BSR
JMP
JSR
LDM
LINK
NOP
RTD
RTE
RTS
SCB
SLEEP
STM
(Condition)
Condition false, branch not taken
Condition true, branch taken
Condition false, branch not taken
Condition true, branch taken
d:8
d:16
@aa:16
@Rn
@(d:8, Rn)
@(d:16, Rn)
@aa:16
@Rn
@(d:8, Rn)
@(d:16, Rn)
#xx:8
#xx:16
#xx:8
#xx:16
Minimum mode
Maximum mode
Condition false, branch not taken
Count = –1, branch not taken
Other than the above, branch taken
Cycles preceding transition to power-
down mode
* n is the number of registers specified in the register list.
Execution Cycles
3
7
3
7
9
9
7
6
7
8
9
9
9
10
6 + 4n*
6
7
2
9
9
13
15
8
3
4
8
2
6 + 3n*
I
J+K
2
5
3
6
2
4
2
5
5
5
5
6
2
5
2
5
2
5
2
6
2n
2
2
2
2
3
1
2
4
2
5
4
4
6
4
2
4
3
3
6
0
2n
2
365