HD6475328-CP10 Datasheet, PDF (334/459 Pages) Hitachi Semiconductor – original Hitachi CMOS microcomputer unit (MCU)

Table 20-6 Timing Conditions of On-Chip Supporting Modules
Conditions: VCC = 5.0V ±10%, AVCC = 5.0V ±10%, ø = 0.5 to 10MHz, VSS = 0V
Ta = –20 to +75˚C (Regular Specifications)
Ta = –40 to +85˚C (Wide-Range Specifications)
6MHz
8MHz
10MHz
Measurement
Item
Symbol Min Max Min Max Min Max Unit Conditions
FRT Timer output delay time
tFTOD – 100 – 100 – 100 ns See figure 20-14
Timer input setup time
tFTIS
50 –
50 – 50 – ns
Timer clock input setup time
tFTCS
50 –
50 –
50 – ns See figure 20-15
Timer clock pulse width
tFTCWL,
tFTCWH 1.5 –
1.5 –
1.5 – tcyc
TMR Timer output delay time
tTMOD – 100 – 100 – 100 ns See figure 20-16
Timer clock input setup time
tTMCS 50 –
50 –
50 – ns See figure 20-17
Timer clock pulse width
tTMCWL,
tTMCWH 1.5 –
1.5 –
1.5 – tcyc
Timer reset input setup time
tTMRS 50 –
50 –
50 – ns See figure 20-18
PWM Timer output delay time
tPWOD – 100 – 100 – 100 ns See figure 20-19
SCI Input clock cycle
(Async) tScyc
2–
2–
2 – tcyc See figure 20-20
(Sync)
4–
4–
4–
tcyc
Input clock pulse width
tSCKW 0.4 0.6 0.4 0.6 0.4 0.6 tScyc
Transmit data delay time (Sync) tTXD
– 100 – 100 – 100 ns See figure 20-21
Receive data setup time (Sync) tRXS
100 –
100 – 100 – ns
Receive data hold time (Sync) tRXH
100 –
100 –
100 – ns
Port Output data delay time
tPWD – 100 – 100 – 100 ns See figure 20-13
Input data setup time
tPRS
50 –
50 – 50 – ns
Input data hold time
tPRH
50 –
50 –
50 – ns
• Measurement Conditions for AC Characteristics
5V
H8/532
output pin
RH
C
RL
C_C=₌9₉0₀p_pF_F: P_: 1_P,₁P_,2_P, P_2,3,_PP₃4_,,_PP₄5_,, P_P6_{5, P6}
=₌3₃0₀pF_p:_FP_: 7_P,₇P_,9_P9
R_RL_L= 2₌.4_2.k₄Ω_k
R_RH_H= ₌12₁k₂Ω_k
I_In_np_pu_ut/_to_/u_ot_up_tu_pt_uti_tm_ti_in_mg_inre_gfe_rr_ee_fn_ec_re_el_ne_cve_els_levels
L_Lo_ow_w: _: 0.8₀V_.8V
H_Hig_igh_h: _:2.0₂V_.0V
Figure 20-3 Output Load Circuit
325