HD6475328-CP10 Datasheet, PDF (197/459 Pages) Hitachi Semiconductor – original Hitachi CMOS microcomputer unit (MCU)

10.1.4 Register Configuration
Table 10-2 lists the registers of each free-running timer channel.
Table 10-2 Register Configuration
Initial
Channel Name
Abbreviation R/W Value
Timer control register
TCR
R/W H'00
Timer control/status register
TCSR
R/(W)* H'00
Free-running counter (High)
FRC (H)
R/W H'00
Free-running counter (Low)
FRC (L)
R/W H'00
1
Output compare register A (High) OCRA (H)
R/W H'FF
Output compare register A (Low) OCRA (L)
R/W H'FF
Output compare register B (High) OCRB (H)
R/W H'FF
Output compare register B (Low) OCRB (L)
R/W H'FF
Input capture register (High)
ICR (H)
R
H'00
Input capture register (Low)
ICR (L)
R
H'00
Timer control register
TCR
R/W H'00
Timer control/status register
TCSR
R/(W)* H'00
Free-running counter (High)
FRC (H)
R/W H'00
Free-running counter (Low)
FRC (L)
R/W H'00
2
Output compare register A (High) OCRA (H)
R/W H'FF
Output compare register A (Low) OCRA (L)
R/W H'FF
Output compare register B (High) OCRB (H)
R/W H'FF
Output compare register B (Low) OCRB (L)
R/W H'FF
Input capture register (High)
ICR (H)
R
H'00
Input capture register (Low)
ICR (L)
R
H'00
* Software can write a “0” to clear bits 7 to 4, but cannot write a “1” in these bits.
Address
H'FF90
H'FF91
H'FF92
H'FF93
H'FF94
H'FF95
H'FF96
H'FF97
H'FF98
H'FF99
H'FFA0
H'FFA1
H'FFA2
H'FFA3
H'FFA4
H'FFA5
H'FFA6
H'FFA7
H'FFA8
H'FFA9
180