English
Language : 

HD6475328-CP10 Datasheet, PDF (148/459 Pages) Hitachi Semiconductor – original Hitachi CMOS microcomputer unit (MCU)
7.3 Operation in Each Wait Mode
Table 7-2 summarizes the operation of the three wait modes.
Table 7-2 Wait Modes
Mode
Programmable
wait mode
WMS1 = “0”
WMS0 = “0”
Pin wait mode
WMS1 = “1”
WMS0 = “0”
Pin auto-wait
mode
WMS1 = “1”
WMS0 = “1”
WAIT
Pin Function
Disabled
Insertion
Conditions
Inserted on access to
an off-chip address
Number of Wait
States Inserted
1 to 3 wait states are inserted, as
specified by bits WC0 and WC1.
Enabled
Enabled
Inserted on access to 0 to 3 wait states are inserted, as
an off-chip address specified by bits WC0 and WC1,
plus additional wait states while the
WAIT pin is held Low.
Inserted on access to 1 to 3 wait states are inserted, as
an off-chip address if specified by bits WC0 and WC1.
the WAIT pin is Low
7.3.1 Programmable Wait Mode
The programmable wait mode is selected when WMS1 = “0” and WMS0 = “0.”
Whenever the CPU or DTC accesses an off-chip address, the number of wait states set in bits
WC1 and WC0 are inserted. The WAIT pin is not used for wait control; it is available as an I/O
pin.
130