MC68HC11E0CFNE2 Datasheet, PDF (83/242 Pages) Freescale Semiconductor, Inc – M68HC11 CPU, Power-saving stop and wait modes, Low-voltage devices available (3.0–5.5 Vdc)

5.2.6 Configuration Control Register
Effects of Reset
Address:
Read:
Write:
Reset:
$103F
Bit 7
6
5
4
3
2
1
EE3
EE2
EE1
EE0 NOSEC NOCOP ROMON
0
0
0
0
1
1
1
Figure 5-3. Configuration Control Register (CONFIG)
Bit 0
EEON
1
EE[3:0] — EEPROM Mapping Bits
EE[3:0] apply only to MC68HC811E2. Refer to Chapter 2 Operating Modes and On-Chip Memory.
NOSEC — Security Mode Disable Bit
Refer to Chapter 2 Operating Modes and On-Chip Memory.
NOCOP — COP System Disable Bit
0 = COP enabled (forces reset on timeout)
1 = COP disabled (does not force reset on timeout)
ROMON — ROM (EPROM) Enable Bit
Refer to Chapter 2 Operating Modes and On-Chip Memory.
EEON — EEPROM Enable Bit
Refer to Chapter 2 Operating Modes and On-Chip Memory.
5.3 Effects of Reset
When a reset condition is recognized, the internal registers and control bits are forced to an initial state.
Depending on the cause of the reset and the operating mode, the reset vector can be fetched from any
of six possible locations. Refer to Table 5-2.
Table 5-2. Reset Cause, Reset Vector, and Operating Mode
Cause of Reset
POR or RESET pin
Clock monitor failure
COP Watchdog Timeout
Normal Mode
Vector
$FFFE, FFFF
$FFFC, FFFD
$FFFA, FFFB
Special Test
or Bootstrap
$BFFE, $BFFF
$BFFC, $BFFD
$BFFA, $BFFB
These initial states then control on-chip peripheral systems to force them to known startup states, as
described in the following subsections.
5.3.1 Central Processor Unit (CPU)
After reset, the central processor unit (CPU) fetches the restart vector from the appropriate address during
the first three cycles and begins executing instructions. The stack pointer and other CPU registers are
indeterminate immediately after reset; however, the X and I interrupt mask bits in the condition code
register (CCR) are set to mask any interrupt requests. Also, the S bit in the CCR is set to inhibit stop mode.
M68HC11E Family Data Sheet, Rev. 5.1
Freescale Semiconductor
83