MC68HC11E0CFNE2 Datasheet, PDF (39/242 Pages) Freescale Semiconductor, Inc – M68HC11 CPU, Power-saving stop and wait modes, Low-voltage devices available (3.0–5.5 Vdc)

Addr.
$103E
Register Name
Reserved
Memory Map
Bit 7
6
5
4
3
2
1
Bit 0
R
R
R
R
R
R
R
R
System Configuration Register ^Read:
$103F
(CONFIG) Write:
See page 43. _{Reset: 0}
0
0
NOSEC
0
U
$103F
System Configuration Register ^Read:
(CONFIG)⁽³⁾ Write:
EE3
EE2
EE1
See page 43. _{Reset: 1}
1
1
EE0
NOSEC
1
U
1. Can be written only once in first 64 cycles out of reset in normal modes or at any time during special modes.
2. MC68HC711E9 only
3. MC68HC811E2 only
NOCOP ROMON
U
1
NOCOP
U
1
= Unimplemented
R = Reserved U = Unaffected
I = Indeterminate after reset
Figure 2-7. Register and Control Bit Assignments (Sheet 6 of 6)
EEON
U
EEON
1
2.3.1 RAM and Input/Output Mapping
Hardware priority is built into RAM and I/O mapping. Registers have priority over RAM and RAM has
priority over ROM. When a lower priority resource is mapped at the same location as a higher priority
resource, a read/write of a location results in a read/write of the higher priority resource only. For example,
if both the register block and the RAM are mapped to the same location, only the register block will be
accessed. If RAM and ROM are located at the same position, RAM has priority.
The fully static RAM can be used to store instructions, variables, and temporary data. The direct
addressing mode can access RAM locations using a 1-byte address operand, saving program memory
space and execution time, depending on the application.
RAM contents can be preserved during periods of processor inactivity by two methods, both of which
reduce power consumption. They are:
1. In the software-based stop mode, the clocks are stopped while V_DD powers the MCU. Because
power supply current is directly related to operating frequency in CMOS integrated circuits, only a
very small amount of leakage exists when the clocks are stopped.
2. In the second method, the MODB/V_STBY pin can supply RAM power from a battery backup or from
a second power supply. Figure 2-8 shows a typical standby voltage circuit for a standard 5-volt
device. Adjustments to the circuit must be made for devices that operate at lower voltages. Using
the MODB/V_STBY pin may require external hardware, but can be justified when a significant amount
of external circuitry is operating from V_DD. If V_STBY is used to maintain RAM contents, reset must
be held low whenever V_DD is below normal operating level. Refer to Chapter 5 Resets and
Interrupts.
M68HC11E Family Data Sheet, Rev. 5.1
Freescale Semiconductor
39