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MC68HC11E0CFNE2 Datasheet, PDF (72/242 Pages) Freescale Semiconductor, Inc – M68HC11 CPU, Power-saving stop and wait modes, Low-voltage devices available (3.0–5.5 Vdc)
Central Processor Unit (CPU)
Table 4-2. Instruction Set (Sheet 1 of 7)
Mnemonic
Operation
Description
Addressing
Mode
Instruction
Condition Codes
Opcode Operand Cycles S X H I N Z V C
ABA
Add
A+B⇒A
INH
1B
—
2
—— ∆ — ∆ ∆ ∆ ∆
Accumulators
ABX
Add B to X
IX + (00 : B) ⇒ IX
INH
3A
—
3
————————
ABY
Add B to Y
IY + (00 : B) ⇒ IY
INH
18
3A
—
4
————————
ADCA (opr) Add with Carry
to A
A+M+C⇒A A
A
A
A
A
IMM
DIR
EXT
IND,X
IND,Y 18
89 ii
99 dd
B9 hh ll
A9 ff
A9 ff
2
—— ∆ — ∆ ∆ ∆ ∆
3
4
4
5
ADCB (opr) Add with Carry
to B
B+M+C⇒B B
B
B
B
B
IMM
DIR
EXT
IND,X
IND,Y 18
C9 ii
D9 dd
F9 hh ll
E9 ff
E9 ff
2
—— ∆ — ∆ ∆ ∆ ∆
3
4
4
5
ADDA (opr) Add Memory to
A
A+M⇒A
A
IMM
8B ii
A
DIR
9B dd
A
EXT
BB hh ll
A
IND,X
AB ff
A
IND,Y 18
AB ff
2
—— ∆ — ∆ ∆ ∆ ∆
3
4
4
5
ADDB (opr) Add Memory to
B
B+M⇒B
B
IMM
CB ii
B
DIR
DB dd
B
EXT
FB hh ll
B
IND,X
EB ff
B
IND,Y 18
EB ff
2
—— ∆ — ∆ ∆ ∆ ∆
3
4
4
5
ADDD (opr) Add 16-Bit to D D + (M : M + 1) ⇒ D
IMM
DIR
EXT
IND,X
IND,Y 18
C3 jj kk
D3 dd
F3 hh ll
E3 ff
E3 ff
4
———— ∆ ∆ ∆ ∆
5
6
6
7
ANDA (opr)
AND A with
Memory
A•M⇒A
A
IMM
84 ii
A
DIR
94 dd
A
EXT
B4 hh ll
A
IND,X
A4 ff
A
IND,Y 18
A4 ff
2
———— ∆ ∆ 0 —
3
4
4
5
ANDB (opr)
AND B with
Memory
B•M⇒B
B
IMM
C4 ii
B
DIR
D4 dd
B
EXT
F4 hh ll
B
IND,X
E4 ff
B
IND,Y 18
E4 ff
2
———— ∆ ∆ 0 —
3
4
4
5
ASL (opr) Arithmetic Shift
Left
0
C b7
b0
EXT
IND,X
IND,Y 18
78 hh ll
68 ff
68 ff
6
———— ∆ ∆ ∆ ∆
6
7
ASLA
Arithmetic Shift
A
INH
Left A
C b7
0
b0
48
—
2
———— ∆ ∆ ∆ ∆
ASLB
Arithmetic Shift
B
INH
Left B
C b7
0
b0
58
—
2
———— ∆ ∆ ∆ ∆
ASLD
Arithmetic Shift
INH
Left D
0
C b7 A b0 b7 B b0
05
—
3
———— ∆ ∆ ∆ ∆
ASR
Arithmetic Shift
Right
b7
b0 C
EXT
IND,X
IND,Y 18
77 hh ll
67 ff
67 ff
6
———— ∆ ∆ ∆ ∆
6
7
ASRA
Arithmetic Shift
Right A
A
INH
47
—
2
———— ∆ ∆ ∆ ∆
b7
b0 C
ASRB
Arithmetic Shift
Right B
B
INH
57
—
2
———— ∆ ∆ ∆ ∆
b7
b0 C
BCC (rel)
Branch if Carry
Clear
?C=0
REL
24 rr
3
————————
BCLR (opr)
(msk)
Clear Bit(s)
M • (mm) ⇒ M
DIR
IND,X
IND,Y 18
15 dd mm
1D ff mm
1D ff mm
6
———— ∆ ∆ 0 —
7
8
BCS (rel)
Branch if Carry
Set
?C=1
REL
25 rr
3
————————
BEQ (rel) Branch if = Zero
?Z=1
REL
27 rr
3
————————
BGE (rel) Branch if ∆ Zero
?N⊕V=0
REL
2C rr
3
————————
M68HC11E Family Data Sheet, Rev. 5.1
72
Freescale Semiconductor