MC68HC11E0CFNE2 Datasheet, PDF (43/242 Pages) Freescale Semiconductor, Inc – M68HC11 CPU, Power-saving stop and wait modes, Low-voltage devices available (3.0–5.5 Vdc)

Memory Map
2.3.3.1 System Configuration Register
The system configuration register (CONFIG) consists of an EEPROM byte and static latches that control
the startup configuration of the MCU. The contents of the EEPROM byte are transferred into static
working latches during reset sequences. The operation of the MCU is controlled directly by these latches
and not by CONFIG itself. In normal modes, changes to CONFIG do not affect operation of the MCU until
after the next reset sequence. When programming, the CONFIG register itself is accessed. When the
CONFIG register is read, the static latches are accessed. See 2.5.1 EEPROM and CONFIG
Programming and Erasure for information on modifying CONFIG.
To take full advantage of the MCU’s functionality, customers can program the CONFIG register in
bootstrap mode. This can be accomplished by setting the mode pins to logic 0 and downloading a small
program to internal RAM. For more information, Freescale application note AN1060 entitled M68HC11
Bootstrap Mode has been included at the back of this document. The downloadable talker will consist of:
• Bulk erase
• Byte programming
• Communication server
All of this functionality is provided by PCbug11 which can be found on the Freescale Web site at
http://www.freescale.com. For more information on using PCbug11 to program an E-series device,
Freescale engineering bulletin EB296 entitled Programming MC68HC711E9 Devices with PCbug11 and
the M68HC11EVBU has been included at the back of this document.
NOTE
The CONFIG register on the 68HC11 is an EEPROM cell and must be
programmed accordingly.
Operation of the CONFIG register in the MC68HC811E2 differs from other devices in the M68HC11 E
series. See Figure 2-10 and Figure 2-11.
Address: $103F
Bit 7
6
5
4
3
2
1
Bit 0
Read:
Write:
NOSEC NOCOP ROMON EEON
Resets:
Single chip: 0
0
0
0
U
U
1
U
Bootstrap: 0
0
0
0
U
U(L)
U
U
Expanded: 0
0
0
0
1
U
U
U
Test: 0
0
0
0
1
U(L)
U
U
= Unimplemented
U indicates a previously programmed bit. U(L) indicates that the bit resets to the logic level held in the latch prior to reset,
but the function of COP is controlled by the DISR bit in TEST1 register.
Figure 2-10. System Configuration Register (CONFIG)
M68HC11E Family Data Sheet, Rev. 5.1
Freescale Semiconductor
43