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MC9S12C Datasheet, PDF (649/680 Pages) Motorola, Inc – 16-Bit Microcontroller | |||
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Appendix A Electrical Characteristics
A.2.2 ATD Operating Characteristics In 3.3V Range
The Table A-11 shows conditions under which the ATD operates.
The following constraints exist to obtain full-scale, full range results: VSSA ⤠VRL ⤠VIN ⤠VRH ⤠VDDA.
This constraint exists since the sample buffer ampliï¬er can not drive beyond the power supply levels that
it ties to. If the input level goes outside of this range it will effectively be clipped
Table A-11. ATD Operating Characteristics
Conditions are shown in Table A-4 unless otherwise noted; Supply Voltage 3.3V-10% <= VDDA <= 3.3V+10%
Num C
Rating
Symbol
Min
Typ
Max
Unit
Reference Potential
1D
Low
VRL
VSSA
â
VDDA/2
V
High VRH
VDDA/2
â
VDDA
V
2 C Differential Reference Voltage
VRH-VRL
3.0
3.3
3.6
V
3 D ATD Clock Frequency
fATDCLK
0.5
â
2.0
MHz
ATD 10-Bit Conversion Period
4D
Clock Cycles(1) NCONV10
14
â
28
Cycles
Conv, Time at 2.0MHz ATD Clock fATDCLK TCONV10
7
â
14
µs
ATD 8-Bit Conversion Period
5D
Clock Cycles1 NCONV8
12
â
26
Cycles
Conv, Time at 2.0MHz ATD Clock fATDCLK TCONV8
6
â
13
µs
6 D Recovery Time (VDDA=3.3 Volts)
tREC
â
â
20
µs
7 P Reference Supply current
IREF
â
â
0.250
mA
1. The minimum time assumes a ï¬nal sample period of 2 ATD clocks cycles while the maximum time assumes a ï¬nal sample
period of 16 ATD clocks.
A.2.3 Factors Inï¬uencing Accuracy
Three factors â source resistance, source capacitance and current injection â have an inï¬uence on the
accuracy of the ATD.
A.2.3.1 Source Resistance
Due to the input pin leakage current as speciï¬ed in Table A-6 in conjunction with the source resistance
there will be a voltage drop from the signal source to the ATD input. The maximum source resistance RS
speciï¬es results in an error of less than 1/2 LSB (2.5mV) at the maximum leakage current. If device or
operating conditions are less than worst case or leakage-induced error is acceptable, larger values of source
resistance is allowable.
A.2.3.2 Source Capacitance
When sampling an additional internal capacitor is switched to the input. This can cause a voltage drop due
to charge sharing with the external and the pin capacitance. For a maximum sampling error of the input
voltage ⤠1LSB, then the external ï¬lter capacitor, Cf ⥠1024 * (CINS â CINN).
Freescale Semiconductor
MC9S12C-Family / MC9S12GC-Family
649
Rev 01.23
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