MC9S12C Datasheet, PDF (168/680 Pages) Motorola, Inc – 16-Bit Microcontroller

Chapter 6 Background Debug Module (BDMV4) Block Description
6.3 Memory Map and Register Definition
A summary of the registers associated with the BDM is shown in Figure 6-2. Registers are accessed by
host-driven communications to the BDM hardware using READ_BD and WRITE_BD commands.
Detailed descriptions of the registers and associated bits are given in the subsections that follow.
6.3.1 Module Memory Map
Table 6-1. INT Memory Map
Register
Address
0xFF00
0xFF01
0xFF02–
0xFF05
0xFF06
0xFF07
0xFF08–
0xFF0B
Use
Reserved
BDM Status Register (BDMSTS)
Reserved
BDM CCR Holding Register (BDMCCR)
BDM Internal Register Position (BDMINR)
Reserved
Access
—
R/W
—
R/W
R
—
168
MC9S12C-Family / MC9S12GC-Family
Freescale Semiconductor
Rev 01.23