MC9S12C Datasheet, PDF (40/680 Pages) Motorola, Inc – 16-Bit Microcontroller

Chapter 1 MC9S12C and MC9S12GC Device Overview (MC9S12C128)
0x0140–0x017F CAN (Scalable Controller Area Network — MSCAN)⁽¹⁾ (continued)
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Read: 0
0
0
0
0
0x014A CANTBSEL
TX2
TX1
Write:
Read: 0
0x014B CANIDAC
Write:
0
0
IDHIT2 IDHIT1
IDAM1 IDAM0
Read: 0
0
0
0
0
0
0
0x014C Reserved
Write:
Read: 0
0
0
0
0
0
0
0x014D Reserved
Write:
Read: RXERR7 RXERR6 RXERR5 RXERR4 RXERR3 RXERR2 RXERR1
0x014E CANRXERR
Write:
Read: TXERR7 TXERR6 TXERR5 TXERR4 TXERR3 TXERR2 TXERR1
0x014F CANTXERR
Write:
0x0150– CANIDAR0 - Read:
0x0153 CANIDAR3 Write:
AC7
AC6
AC5
AC4
AC3
AC2
AC1
0x0154– CANIDMR0 - Read:
0x0157 CANIDMR3 Write:
AM7
AM6
AM5
AM4
AM3
AM2
AM1
0x0158– CANIDAR4 - Read:
0x015B CANIDAR7 Write:
AC7
AC6
AC5
AC4
AC3
AC2
AC1
0x015C– CANIDMR4 - Read:
0x015F CANIDMR7 Write:
AM7
AM6
AM5
AM4
AM3
AM2
AM1
0x0160–
0x016F
CANRXFG
Read:
Write:
FOREGROUND RECEIVE BUFFER see Table 1-2
0x0170–
0x017F
CANTXFG
Read:
Write:
FOREGROUND TRANSMIT BUFFER see Table 1-2
1. Not available on the MC9S12GC Family members. Those memory locations should not be accessed.
TX0
IDHIT0
0
0
RXERR0
TXERR0
AC0
AM0
AC0
AM0
Table 1-2. Detailed MSCAN Foreground Receive and Transmit Buffer Layout
Address
Name
Extended ID
0xXXX0 Standard ID
CANxRIDR0
Extended ID
0xXXX1 Standard ID
CANxRIDR1
Extended ID
0xXXX2 Standard ID
CANxRIDR2
Extended ID
0xXXX3 Standard ID
CANxRIDR3
0xXXX4– CANxRDSR0–
0xXXXB CANxRDSR7
0xXXXC CANRxDLR
Read:
Read:
Write:
Read:
Read:
Write:
Read:
Read:
Write:
Read:
Read:
Write:
Read:
Write:
Read:
Write:
Bit 7
ID28
ID10
ID20
ID2
ID14
ID6
DB7
Bit 6
ID27
ID9
ID19
ID1
ID13
ID5
DB6
Bit 5
ID26
ID8
ID18
ID0
ID12
Bit 4
ID25
ID7
Bit 3
ID24
ID6
SRR=1
RTR
IDE=1
IDE=0
ID11
ID10
Bit 2
ID23
ID5
ID17
ID9
Bit 1
ID22
ID4
ID16
ID8
ID4
ID3
ID2
ID1
ID0
DB5
DB4
DB3
DB2
DB1
DLC3 DLC2 DLC1
Bit 0
ID21
ID3
ID15
ID7
RTR
DB0
DLC0
40
MC9S12C-Family / MC9S12GC-Family
Freescale Semiconductor
Rev 01.23