MC9S12C Datasheet, PDF (105/680 Pages) Motorola, Inc – 16-Bit Microcontroller

Chapter 2 Port Integration Module (PIM9C32) Block Description
2.4.1.4 Reduced Drive Register
If the port is used as an output the register allows the configuration of the drive strength.
2.4.1.5 Pull Device Enable Register
This register turns on a pull-up or pull-down device. It becomes only active if the pin is used as an input
or as a wired-or output.
2.4.1.6 Polarity Select Register
This register selects either a pull-up or pull-down device if enabled. It becomes only active if the pin is
used as an input. A pull-up device can be activated if the pin is used as a wired-OR output.
2.4.2 Port Descriptions
2.4.2.1 Port T
This port is associated with the Standard Capture Timer. PWM output channels can be rerouted from port
P to port pins T. In all modes, port T pins can be used for either general-purpose I/O, Standard Capture
Timer I/O or as PWM channels module, if so configured by MODRR.
During reset, port T pins are configured as high-impedance inputs.
2.4.2.2 Port S
This port is associated with the serial SCI module. Port S pins PS[3:0] can be used either for general-
purpose I/O, or with the SCI subsystem.
During reset, port S pins are configured as inputs with pull-up.
2.4.2.3 Port M
This port is associated with the MSCAN and SPI module. Port M pins PM[5:0] can be used either for
general-purpose I/O, with the MSCAN or SPI subsystems.
During reset, port M pins are configured as inputs with pull-up.
2.4.2.4 Port AD
This port is associated with the ATD module. Port AD pins can be used either for general-purpose I/O, or
for the ATD subsystem. There are 2 data port registers associated with the Port AD: PTAD[7:0], located
in the PIM and PORTAD[7:0] located in the ATD.
To use PTAD[n] as a standard input port, the corresponding DDRD[n] must be cleared. To use PTAD[n]
as a standard output port, the corresponding DDRD[n] must be set
NOTE: To use PORTAD[n], located in the ATD as an input port register, DDRD[n] must be cleared and
ATDDIEN[n] must be set. Please refer to ATD Block Guide for details.
Freescale Semiconductor
MC9S12C-Family / MC9S12GC-Family
105
Rev 01.23