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MC9S12C Datasheet, PDF (239/680 Pages) Motorola, Inc – 16-Bit Microcontroller | |||
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Chapter 8 Analog-to-Digital Converter (ATD10B8C) Block Description
Table 8-13. ATDSTAT0 Field Descriptions (continued)
Field
4
FIFOR
2â0
CC[2:0]
Description
FIFO Over Run Flag â This bit indicates that a result register has been written to before its associated
conversion complete ï¬ag (CCF) has been cleared. This ï¬ag is most useful when using the FIFO mode because
the ï¬ag potentially indicates that result registers are out of sync with the input channels. However, it is also
practical for non-FIFO modes, and indicates that a result register has been over written before it has been read
(i.e. the old data has been lost). This ï¬ag is cleared when one of the following occurs:
A) Write â1â to FIFOR
B) Start a new conversion sequence (write to ATDCTL5 or external trigger)
0 No over run has occurred
1 An over run condition exists
Conversion Counter â These 3 read-only bits are the binary value of the conversion counter. The conversion
counter points to the result register that will receive the result of the current conversion. For example, CC2 = 1,
CC1 = 1, CC0 = 0 indicates that the result of the current conversion will be in ATD Result Register 6. If in non-
FIFO mode (FIFO = 0) the conversion counter is initialized to zero at the begin and end of the conversion
sequence. If in FIFO mode (FIFO = 1) the register counter is not initialized. The conversion counters wraps
around when its maximum value is reached.
Aborting a conversion or starting a new conversion by write to an ATDCTL register (ATDCTL5-2) clears the
conversion counter even if FIFO=1.
8.3.2.8 Reserved Register (ATDTEST0)
Module Base + 0x0008
7
6
5
4
3
2
1
0
R
U
U
U
U
U
U
U
U
W
Reset
1
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 8-10. Reserved Register (ATDTEST0)
Read: Anytime, returns unpredictable values
Write: Anytime in special modes, unimplemented in normal modes
NOTE
Writing to this registers when in special modes can alter functionality.
Freescale Semiconductor
MC9S12C-Family / MC9S12GC-Family
239
Rev 01.23
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