MC9S12C Datasheet, PDF (279/680 Pages) Motorola, Inc – 16-Bit Microcontroller

Exit Stop w.
ext.RESET
Wait Mode left
due to external
Chapter 9 Clocks and Reset Generator (CRGV4) Block Description
Core req’s
Stop Mode.
Clear
PLLSEL,
Disable PLL
Enter
Stop Mode
no
no
Exit Stop w. no
CMRESET
SCME=1
?
yes
Exit
Stop Mode
INT
no
?
yes
PSTP=1 ^yes
?
CME=1 ^no
?
yes
Clock
OK
?
yes
Exit Stop w. no
CMRESET
CM fail no
?
yes
SCME=1
?
yes
Exit
Stop Mode
Generate
SCM Interrupt
(Wakeup from Stop)
SCMIE=1 ^no
?
yes
Exit
Stop Mode
Enter
Enter
SCM
SCM
no
INT
?
yes
Exit
Stop Mode
SCM=1 no
?
yes
Enter
SCM
Continue w.
normal OP
Figure 9-24. Stop Mode Entry/Exit Sequence
9.4.10.1 Wake-Up from Pseudo-Stop (PSTP=1)
Wake-up from pseudo-stop is the same as wake-up from wait mode. There are also three different scenarios
for the CRG to restart the MCU from pseudo-stop mode:
• External reset
• Clock monitor fail
• Wake-up interrupt
Freescale Semiconductor
MC9S12C-Family / MC9S12GC-Family
279
Rev 01.23