MC9S12C Datasheet, PDF (46/680 Pages) Motorola, Inc – 16-Bit Microcontroller

Chapter 1 MC9S12C and MC9S12GC Device Overview (MC9S12C128)
1.3 Signal Description
1.3.1 Device Pinouts
PW3/KWP3/PP3 1
PW2/KWP2/PP2 2
PW1/KWP1/PP1 3
PW0/KWP0/PP0 4
PW0/IOC0/PT0 5
PW1/IOC1/PT1 6
PW2/IOC2/PT2 7
PW3/IOC3/PT3 8
V_DD1 9
V_SS1 10
PW4/IOC4/PT4 11
IOC5/PT5 12
IOC6/PT6 13
IOC7/PT7 14
MODC/TAGHI/BKGD 15
ADDR0/DATA0/PB0 16
ADDR1/DATA1/PB1 17
ADDR2/DATA2/PB2 18
ADDR3/DATA3/PB3 19
ADDR4/DATA4/PB4 20
MC9S12C-Family /
MC9S12GC-Family
60 V_RH
59 V_DDA
58 PAD07/AN07
57 PAD06/AN06
56 PAD05/AN05
55 PAD04/AN04
54 PAD03/AN03
53 PAD02/AN02
52 PAD01/AN01
51 PAD00/AN00
50 V_SS2
49 V_DD2
48 PA7/ADDR15/DATA15
47 PA6/ADDR14/DATA14
46 PA5/ADDR13/DATA13
45 PA4/ADDR12/DATA12
44 PA3/ADDR11/DATA11
43 PA2/ADDR10/DATA10
42 PA1/ADDR9/DATA9
41 PA0/ADDR8/DATA8
Signals shown in Bold are not available on the 52- or 48-pin package
Signals shown in Bold Italic are available in the 52-pin, but not the 48-pin package
Figure 1-7. Pin Assignments in 80-Pin QFP
The MODRR register within the PIM allows for mapping of PWM channels to Port T in the absence of
Port P pins for the low pin count packages. For the 80QFP package option it is recommended not to use
MODRR since this is intended to support PWM channel availability in low pin count packages. Note that
when mapping PWM channels to Port T in an 80QFP option, the associated PWM channels are then
mapped to both Port P and Port T
46
MC9S12C-Family / MC9S12GC-Family
Freescale Semiconductor
Rev 01.23