XRT72L71 Datasheet, PDF (91/102 Pages) Exar Corporation – DS3 ATM UNI/CLEAR CHANNEL FRAMER

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XRT72L71
DS3 ATM UNI/CLEAR CHANNEL FRAMER
REV. 1.1.0
REGISTER 101
BIT
FUNCTION
7-0 Tx Idle Cell Pattern 2
TABLE 102: TX CP IDLE CELL PATTERN HEADER BYTE-2
TX CP IDLE CELL PATTERN HEADER BYTE-2
HEX ADDRESS: 0X65
TYPE
R/W
DEFAULT
DESCRIPTION-OPERATION
0x00
Contains pattern for the second header byte of each “outbound” idle cell.
Register is set to 0x00 when transmitting standard idle cell pattern.
NOTE: This bit-field is only active if the XRT72L71 is configured to operate
in the “ATM UNI” Mode.
REGISTER 102
BIT
FUNCTION
7-0 Tx Idle Cell Pattern 3
TABLE 103: TX CP IDLE CELL PATTERN HEADER BYTE-3
TX CP IDLE CELL PATTERN HEADER BYTE-3
HEX ADDRESS: 0X66
TYPE
DEFAULT
DESCRIPTION-OPERATION
Contains pattern for the third header byte of each “outbound” idle cell.
Register is set to 0x00 when transmitting standard idle cell pattern.
R/W
0x00 _{NOTE: This bit-field is only active if the XRT72L71 is configured to operate}
in the “ATM UNI” Mode.
REGISTER 103
BIT
FUNCTION
7-0 Tx Idle Cell Pattern 4
TABLE 104: TX CP IDLE CELL PATTERN HEADER BYTE-4
TX CP IDLE CELL PATTERN HEADER BYTE-4
HEX ADDRESS: 0X67
TYPE
DEFAULT
DESCRIPTION-OPERATION
Contains pattern for the fourth header byte of each “outbound” idle cell.
Register is set to 0x01 when transmitting standard idle cell pattern.
R/W
0x01 _{NOTE: This bit-field is only active if the XRT72L71 is configured to operate}
in the “ATM UNI” Mode.
REGISTER 104
BIT
FUNCTION
7-0 Tx Idle Cell Pattern 5
TABLE 105: TX CP IDLE CELL PATTERN HEADER BYTE-5
TX CP IDLE CELL PATTERN HEADER BYTE-5
HEX ADDRESS: 0X68
TYPE
DEFAULT
DESCRIPTION-OPERATION
Contains pattern for the fifth header byte of each “outbound” idle cell.
Register is set to 0x00 when transmitting standard idle cell pattern.
R/W
0x52 _{NOTE: This bit-field is only active if the XRT72L71 is configured to operate}
in the “ATM UNI” Mode.
REGISTER 105
BIT
FUNCTION
7-0 Tx Idle Cell Payload
TABLE 106: TX CP IDLE CELL PAYLOAD REGISTER
TX CP IDLE CELL PAYLOAD REGISTER
HEX ADDRESS: 0X69
TYPE
R/W
DEFAULT
DESCRIPTION-OPERATION
0x5A
This register contains the value of the payload bytes within each “outbound”
Idle Cell. The contents of this register will be repeated 48 times, when filling
the payload of each “outbound” Idle Cell. pRegister is set to 0x5A when
transmitting standard idle cell pattern.
NOTE: This bit-field is only active if the XRT72L71 is configured to operate
in the “ATM UNI” Mode.
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