XRT72L71 Datasheet, PDF (69/102 Pages) Exar Corporation – DS3 ATM UNI/CLEAR CHANNEL FRAMER

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XRT72L71
DS3 ATM UNI/CLEAR CHANNEL FRAMER
REV. 1.1.0
REGISTER 34
TABLE 35: PMON FRAMING BIT ERROR EVENT COUNT REGISTER - MSB
PMON FRAMING BIT ERROR EVENT COUNT REGISTER - MSB
HEX ADDRESS: 0X22
BIT
FUNCTION
TYPE
7-0 F Bit Error Count High-byte RUR
DEFAULT
DESCRIPTION-OPERATION
0x00
This “Reset-upon-Read” register, along with “PMON Framing Bit Error Count
Register - LSB” contains the 16 bit value for the total number of Framing Bit
(e.g., both F and M-bit) errors that have been detected since the last read of
this register. This register contains the “High” byte value of this 16-bit
expression.
REGISTER 35
TABLE 36: PMON FRAMING BIT ERROR EVENT COUNT REGISTER - LSB
PMON FRAMING BIT ERROR EVENT COUNT REGISTER - LSB
HEX ADDRESS: 0X23
BIT
FUNCTION
7-0 F Bit Error Count low-byte
TYPE
RUR
DEFAULT
DESCRIPTION-OPERATION
0x00
This “Reset-upon-Read” register, along with “PMON Framing Bit Error Count
Register - MSB” contains the 16 bit value for the total number of Framing Bit
(e.g., both F and M-bit) errors that have been detected since the last read of
this register. This register contains the “Low” byte value of this 16-bit
expression.
REGISTER 36
TABLE 37: PMON P-BIT ERROR COUNT REGISTER - MSB
PMON P-BIT ERROR COUNT REGISTER - MSB
HEX ADDRESS: 0X24
BIT
FUNCTION
TYPE
7-0 P-Bit Error Count High-byte RUR
DEFAULT
DESCRIPTION-OPERATION
0x00
This “Reset-upon-Read” register, along with “PMON P-Bit Error Count Reg-
ister - LSB” contains the 16 bit value for the total number of P Bit errors that
have been detected since the last read of this register. This register con-
tains the “High” byte value of this 16-bit expression.
REGISTER 37
TABLE 38: PMON P-BIT ERROR COUNT REGISTER - LSB
PMON P-BIT ERROR COUNT REGISTER - LSB
HEX ADDRESS: 0X25
BIT
FUNCTION
TYPE
DEFAULT
DESCRIPTION-OPERATION
7-0 P-Bit Error Count Low-byte RUR
0x00
This “Reset-upon-Read” register, along with “PMON P-Bit Error Count Reg-
ister - MSB” contains the 16 bit value for the total number of P Bit errors that
have been detected since the last read of this register. This register con-
tains the “Low” byte value of this 16-bit expression.
REGISTER 38
TABLE 39: PMON FEBE EVENT COUNT REGISTER - MSB
PMON FEBE EVENT COUNT REGISTER - MSB
HEX ADDRESS: 0X26
BIT
FUNCTION
TYPE
DEFAULT
DESCRIPTION-OPERATION
7-0
FEBE Event Count High-
byte
RUR
0x00
This “Reset-upon-Read” register, along with “PMON FEBE Event Count
Register - LSB” contains the 16 bit value for the total number of FEBE events
that have been detected since the last read of this register. This register
contains the “High” byte value of this 16-bit expression.
NOTE: This register is only active if the XRT72L71 has been configured to
support the “C-bit Parity” Framing format.
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