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XRT72L71 Datasheet, PDF (86/102 Pages) Exar Corporation – DS3 ATM UNI/CLEAR CHANNEL FRAMER | |||
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XRT72L71
DS3 ATM UNI/CLEAR CHANNEL FRAMER
REV. 1.1.0
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REGISTER 86
BIT
FUNCTION
7-0 Rx Idle Cell Mask 3
TABLE 87: RX CP IDLE CELL MASK HEADER BYTE-3
RX CP IDLE CELL MASK HEADER BYTE-3
HEX ADDRESS: 0X56
TYPE
DEFAULT
DESCRIPTION-OPERATION
This register, along with the âRx Idle Cell Pattern - 3â Register permits the
user to define âIdle Cell Filteringâ criteria for Header byte 3.
R/W
0xFF
Any â1â in this register, configures the Receive Cell Processor to make the
comparison between the corresponding bit-field within Header byte 3 and
the contents of the âRx Idle Cell Pattern - 3â register.
Any â0â in this register, configures the Receive Cell Processor to NOT per-
form this comparison:
This register should be set to â0xFFâ when the Receive Cell Processor is
receiving the âATM Forumâ Standard Idle cells.
NOTE: This register is only active if the XRT72L71 has been configured to
operate in the âATM UNIâ Mode.
REGISTER 87
BIT
FUNCTION
7-0 Rx Idle Cell Mask 4
TABLE 88: RX CP IDLE CELL MASK HEADER BYTE-4
RX CP IDLE CELL MASK HEADER BYTE-4
HEX ADDRESS: 0X57
TYPE
DEFAULT
DESCRIPTION-OPERATION
This register, along with the âRx Idle Cell Pattern - 4â Register permits the
user to define âIdle Cell Filteringâ criteria for Header byte 4.
Any â1â in this register, configures the Receive Cell Processor to make the
comparison between the corresponding bit-field within Header byte 4 and
the contents of the âRx Idle Cell Pattern - 4â register.
R/W
0xFF
Any â0â in this register, configures the Receive Cell Processor to NOT per-
form this comparison:
This register should be set to â0xFFâ when the Receive Cell Processor is
receiving the âATM Forumâ Standard Idle cells.
NOTE: This register is only active if the XRT72L71 has been configured to
operate in the âATM UNIâ Mode.
REGISTER 88
TABLE 89: RX CP USER CELL FILTER PATTERN HEADER BYTE-1
RX CP USER CELL FILTER PATTERN HEADER BYTE-1
HEX ADDRESS: 0X58
BIT
FUNCTION
TYPE
7-0 RxUser Cell Filter Pattern 1 R/W
DEFAULT
DESCRIPTION-OPERATION
0x00
This register (along with the âRx User Cell Mask 1â register) permits the user
to specify the âUser Cell Filteringâ criteria for Header Byte 1.
NOTE: This bit-field is only active if the XRT72L71 is operating in the âATM
UNIâ Mode.
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