XRT72L71 Datasheet, PDF (50/102 Pages) Exar Corporation – DS3 ATM UNI/CLEAR CHANNEL FRAMER

XRT72L71
DS3 ATM UNI/CLEAR CHANNEL FRAMER
REV. 1.1.0
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REGISTER 0
BIT
FUNCTION
7 Local Loop-back
6 Cell Loop-back
5 PLCP Loop-back
4 RESET
3 Direct-mapped ATM
2 C-BIT/M13
1
Timing Reference
Select (1)
0
Timing Reference
Select (0)
TABLE 1: UNI OPERATING MODE REGISTER
UNI OPERATING MODE REGISTER
HEX ADDRESS: 0X00
TYPE
R/W
DEFAULT
DESCRIPTION-OPERATION
0: Local Loop-back Mode operation is disabled
0
1: Local Loop-back Mode operation is enabled. The Transmit stream on TxPOS,
TxNEG pins are looped back into the receive RxPOS, RxNEG pins
0: Cell Loop-back Mode operation is disabled
1: Cell Loop-back Mode operation is enabled. Cells from the Receive Cell Pro-
R/W
0
cessor block are written into the Tx FIFO.
NOTE: This bit-field is only active if the XRT72L71 is operating in the ATM UNI
Mode.
0: PLCP Loop-back Mode operation is disabled
1: PLCP Loop-back Mode operation is enabled. PLCP frames are looped from
R/W
0
the Transmit PLCP Processor block into the Receive PLCP Processor Block.
NOTE: This bit-field is only active if the XRT72L71 is operating in the ATM UNI/
PLCP Mode.
R/W
0
0: Normal Operation
1: A “0” to “1” transition causes a reset of the UNI/Framer device.
0: PLCP Mode is enabled. Transmit and Receive PLCP Processor blocks are
enabled.
1: Direct-Mapped ATM Mode. Transmit and Receive PLCP Processor blocks are
R/W
1
disabled.
NOTE: This bit-field is only active if the XRT72L71 is operating in the ATM UNI
Mode.
R/W
0
0: XRT72L71 will support the “DS3/C-Bit Parity” Framing Format.
1: XRT72L71 will support the “DS3/M13” Framing Format.
PLCP block
R/W
1
00: Transmitter timings taken from the Receive PLCP Processor (Loop-Timing).
01: 8 kHz reference signal on 8kRef pin used for stuffing and framing
10: StuffCtl is used for stuffing control, framing is asynchronous on power on
11: Fixed stuffing pattern is used. Framing is asynchronous on power on
Framer block
R/W
1
00: Transmitter timings are taken from the Receive DS3 Framer (Loop-Timing)
01: Framing is asynchronous on power-on, and TxInClk is used as the transmit
clock
10: Transmitter follows external pin (TxFrameRef) framing reference
11: Framin is asynchronous on power-on, and TxInClk is used as the transmit
clock
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