XRT72L71 Datasheet, PDF (73/102 Pages) Exar Corporation – DS3 ATM UNI/CLEAR CHANNEL FRAMER

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XRT72L71
DS3 ATM UNI/CLEAR CHANNEL FRAMER
REV. 1.1.0
REGISTER 51
TABLE 52: PMON RECEIVED IDLE CELL COUNT/PRBS ERROR COUNT - LSB
PMON RECEIVED IDLE CELL COUNT/PRBS ERROR COUNT - LSB
HEX ADDRESS: 0X33
BIT
FUNCTION
TYPE
DEFAULT
DESCRIPTION-OPERATION
ATM Mode: This register, along with “PMON Received Idle Cell
Count - MSB” contains the 16 bit value for the total number of idle
cells that have been received by the Receive Cell Processor, since
Rx Idle Cell Count Low-
7-0
byte/
PRBS Error Count Low-
RUR
the last read of this register. This register contains the “Low” byte
value of this 16-bit expression.
0x00 _{Clear Channel Framer Mode: This register, along with “PMON}
byte
PRBS Error Count - MSB” regster contains the 16 bit value for the
total number of PRBS bit errors that have been received (by the
PRBS Receiver) since the last read of this register. This register
contains the “Low” byte value of this 16-bit expression.
REGISTER 52
BIT
FUNCTION
7-0
Rx Valid Cell Count High-
byte
TABLE 53: PMON RECEIVE VALID CELL COUNT - MSB
PMON RECEIVE VALID CELL COUNT - MSB
HEX ADDRESS: 0X34
TYPE
RUR
DEFAULT
DESCRIPTION-OPERATION
0x00
This Reset-upon-Read register, along with PMON Receive Valid Cell Count -
LSB” contains the 16 bit value for the total number of Valid Cells that have
been received since the last read of this register. This register contains the
“High” byte value of this 16-bit expression.
NOTE: This register is only active if the XRT72L71 has been configured to
operate in the “ATM UNI” Mode.
REGISTER 53
BIT
FUNCTION
7-0
Rx Valid Cell Count Low-
byte
TABLE 54: PMON RECEIVE VALID CELL COUNT - LSB
PMON RECEIVE VALID CELL COUNT - LSB
HEX ADDRESS: 0X35
TYPE
RUR
DEFAULT
DESCRIPTION-OPERATION
0x00
This Reset-upon-Read register, along with PMON Receive Valid Cell Count -
MSB” contains the 16 bit value for the total number of Valid Cells that have
been received since the last read of this register. This register contains the
“Low” byte value of this 16-bit expression.
NOTE: This register is only active if the XRT72L71 has been configured to
operate in the “ATM UNI” Mode.
REGISTER 54
BIT
FUNCTION
7-0 Cell Drop Count High-byte
TABLE 55: PMON DISCARDED CELL COUNT - MSB
PMON DISCARDED CELL COUNT - MSB
HEX ADDRESS: 0X36
TYPE
RUR
DEFAULT
DESCRIPTION-OPERATION
0x00
This Reset-upon-Read register, along with PMON Discarded Cell Count -
LSB” contains the 16 bit value for the total number of cells that have been
discarded since the last read of this register. This register contains the
“High” byte value of this 16-bit expression.
NOTE: This register is only active if the XRT72L71 has been configured to
operate in the “ATM UNI” Mode.
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