XRT72L71 Datasheet, PDF (64/102 Pages) Exar Corporation – DS3 ATM UNI/CLEAR CHANNEL FRAMER

XRT72L71
DS3 ATM UNI/CLEAR CHANNEL FRAMER
REV. 1.1.0
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REGISTER 23
BIT
FUNCTION
7 Tx FEBE Dat(2)
6 Tx FEBE Dat(1)
5 Tx FEBE Dat(0)
4 FEBE Register Enable
3 Mbit Mask(2)
2 Mbit Mask(1)
1 Mbit Mask(0)
0 TxError PBit
TABLE 24: TX DS3 M-BIT MASK REGISTER
TX DS3 M-BIT MASK REGISTER
HEX ADDRESS: 0X17
TYPE
R/W
R/W
R/W
DEFAULT
DESCRIPTION-OPERATION
0
The Transmit DS3 Framer block will transmit the value “TxFEBEDat[2:0]”
0
within the “FEBE” bit-fields, if the “FEBE Register Enable” bit-field is set to
“1”.
0
NOTE: This bit-field is only active if the XRT72L71 is configured to support
the “C-bit Parity” Framing Format.
0: FEBE bits, for transmission, are internally generated based on conditions,
as detected by the Receive DS3 Framer block.
R/W
0
1: Transmit FEBE bits are taken from the TxFEBEDat [2:0] register bits
NOTE: This bit-field is only active if the XRT72L71 is configured to support
the “C-bit Parity” Framing Format.
R/W
R/W
0
The Transmit DS3 Framer block performs an XOR operation of the MBitMask
bits with the corresponding “M” bit, within each outbound DS3 frame.
0
MBitMask(2) corresponds to first M-Bit (M0) in DS3 frame,
MBitMask(1) corresponds to second M-Bit (M1) in DS3 frame,
MBitMask(0) corresponds to last M-Bit (M0) in DS3 frame
NOTES:
R/W
0
1. Setting any of these bit-fields to “1”, will cause an “erred” M-bit to be
transmitted onto the line.
2. For normal operation, the user should set each of these bit-fields to
“0”.
0: P Bits are calculated from input payload and inserted into the P-bit fields.
R/W
1: Calculated P Bits are inverted before transmission (thereby creating a “P-
0
Bit” Error).
NOTE: For normal operation, set this bit-field to “0”.
REGISTER 24
BIT
FUNCTION
7-4 Unused
3 F-bit Mask (27)
2 F-bit Mask (26)
1 F-bit Mask (25)
0 F-bit Mask (24)
TABLE 25: TX DS3 F-BIT MASK1 REGISTER
TX DS3 F-BIT MASK1 REGISTER
HEX ADDRESS: 0X18
TYPE
DEFAULT
DESCRIPTION-OPERATION
RO
0
R/W
0
The Transmit DS3 Framer block performs an XOR operation of the F-Bit
R/W
0
Mask bits, with the corresponding “F” bits, within each outbound DS3 frame.
FBitMask(0) corresponds to first F-Bit (F1) is the DS3 frame, FBitMask (1)
R/W
0
corresponds to 2nd F-Bit (F0)in the DS3 frame,...FBitMask(27) corresponds
to the last F-Bit of the M-Frame.
NOTES:
R/W
0
1. Setting any of these bit-fields to “1” will cause an “erred” F-bit to be
transmitted onto the line.
2. For normal operation, the user should set each of these bit-fields to
“0”.
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