XRT72L71 Datasheet, PDF (58/102 Pages) Exar Corporation – DS3 ATM UNI/CLEAR CHANNEL FRAMER

XRT72L71
DS3 ATM UNI/CLEAR CHANNEL FRAMER
REV. 1.1.0
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REGISTER 15
BIT
FUNCTION
7-5 Unused
4 Rx FERF
3 Rx AIC
2 Rx FEBE(2)
1 RxFEBE(1)
0 RxFEBE(0)
TABLE 16: RXDS3 STATUS REGISTER
RXDS3 STATUS REGISTER
HEX ADDRESS:0X0F
TYPE
RO
DEFAULT
0
DESCRIPTION-OPERATION
Receive FERF (Far-End Receive Failure) Alarm:
0: The Receive DS3 Framer block is NOT currently declaring the “FERF”
RO
0
condition.
1: The Receive DS3 Framer block is currently declaring the “FERF” condi-
tion.
Receive AIC (Application Identification Channe) State:
0: Indicates that the AIC bit-field was set to “0” within two or more of the last
15 M-frames. This indicates that the inbound DS3 data stream is of the “M13
RO
0
Framing” format.
1: Incoming frame is found to be in the C-bit format (AIC bit = 1) for at least
63 consecutive M-frames. This indicates that the inbound DS3 data stream
is of the “C-bit Parity” Framing format.
RO
0
Received FEBE (Far-End-Block Error) Value:
RxFEBE[2:0] contains the value of the most recently received FEBE value.
RO
0
When RxFEBE[2:0] = 011, this indicates that the Remote Terminal has
detected CP-bits or Framing Bit Errors in its DS3 data stream.
When RxFEBE[2:0] = 111, this indicates that the Remote Terminal is not cur-
rently detecting any Framing Bit or CP-bit errors in its DS3 data stream.
RO
0
NOTE: These bit-fields are only active if the XRT72L71 is configured to sup-
port the “C-bit Parity” Framing format.
REGISTER 16
TABLE 17: RX DS3 INTERRUPT ENABLE REGISTER
RX DS3 INTERRUPT ENABLE REGISTER
HEX ADDRESS: 0X10
BIT
FUNCTION
7
CP Bit Error Interupt
Enable
TYPE
R/W
DEFAULT
DESCRIPTION-OPERATION
0
0: Detection of CP-Bit Error Interrupt is disabled
1: Generates Interrupt upon Detection of CP (Path Parity) bit Error.
6 LOS Interrupt Enable
R/W
0
0: Change in LOS Condition Interrupt is disabled
1: Generates interrupt upon change of LOS (Loss of Signal) status
5 AIS Interrupt Enable
R/W
0
0: Change in AIS Condition Interrupt is disabled
1: Generates interrupt upon change of AIS (Alarm Indication Signal) status.
4 Idle Interrupt Enable
R/W
0
0: Change in Idle Condition Interrupt is disabled
1: Generates interrupt upon change of IDLE status
3 FERF Interrupt Enable
R/W
0
0: Change in FERF (Far-End Receive Failure) Condition Interrupt is disabled
1: Generates interrupt upon change in FERF Condition.
2 AIC Interrupt Enable
R/W
1 OOF Interrupt Enable
R/W
0 P-Bit Error Interrupt Enable R/W
0: Change in AIC State Interrupt is disabled
0
1: Generates interrupt upon change of AIC values, in “inbound” DS3 data
steam.
0
0: Change in OOF (Out of Frame) Condition Interrupt is disabled
1: Generates interrupt upon change of OOF condition.
0
0: Detection of P-Bit Error Interrupt disabled
1: Generates interrupt upon Detection of P-bit Error.
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