XRT72L71 Datasheet, PDF (18/102 Pages) Exar Corporation – DS3 ATM UNI/CLEAR CHANNEL FRAMER

XRT72L71
DS3 ATM UNI/CLEAR CHANNEL FRAMER
REV. 1.1.0
PIN DESCRIPTION (CONTINUED)
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PIN NO.
92
SYMBOL
RxAIS
93
RxOHClk
TYPE
O
O
DESCRIPTION
Receive “Alarm Indication Signal” Output pin: The UNI/Framer IC will
assert this pin to indicate that the Alarm Indication Signal (AIS) has been
identified in the Receive DS3 data stream. An “AIS” is detected if the payload
consists of the recurring pattern of 1010... and this pattern persists for 63 M-
frames. An additional requirement for AIS indication is that the C-bits are set
to 0, and the X-bits are set to 1. This pin will be negated when a sufficient number
of frames, not exhibiting the “1010...” pattern in the payload has been
detected.
Receive Overhead Output Clock Signal:
This pin serves as the clock signal for external device to sample the Overhead
data on the RxOH pin. The external interface should use the rising edge of
this clock to sample the OH data on RxOH pin.
94
RxOHInd/
RxPFrame
O _{Receive Overhead Bit Indicator/PLCP Frame Boundary Indicator}
Output—Receive PLCP Processor.
The exact functionality of this output pin depends upon whether the
XRT72L71 UNI/Framer IC is operating in the Clear Channel or ATM Uni
Mode.
Clear Channel Mode - RxOHInd:
In clear channel mode, this pin is pulsed “High” for one bit period whenever an
over-head bit is being output via the RxSerData output pin. In other words, the
“RxSerData” output pin will contain an over-head if this pin is sampled “High”.
ATM UNI Mode:
This output pin pulses “High” when the Receive PLCP Processor is receiving the
last bit of a given PLCP frame.
95
RxOHFrame
O _{Receive Overhead Frame Boundary Indicator:}
This pin is pulsed “High” for one RxOHClk period whenever the first 'X' bit is
output on RxOH pin. If external device samples this pin “High” on the rising
edge of RxOHClk, the data on RxOH is 'X' bit (first OH bit in the received DS3
frame).
96
RxFrame
O _{Receive Boundary of DS3 Frame Output Indicator:}
The exact functionality of this output pin depends upon whether the
XRT72L71 UNI/Framer IC is operating in the Clear Channel or ATM UNI
Mode.
Clear Channel Mode:
In clear channel mode this pin is pulsed “High” for one DS3 clock period
whenever the 'X' bit (first OH bit in the DS3 frame) of the frame is being output
on the RxSer pin. RxSer will contain 'X' bit (first OH bit of DS3 frame) if
this pin is sampled “High”.
ATM UNI Mode:
In the ATM UNI mode, this signal indicates the start of the received DS3 frame
and is "High" for one DS3 clock period.
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