XRT72L71 Datasheet, PDF (80/102 Pages) Exar Corporation – DS3 ATM UNI/CLEAR CHANNEL FRAMER

XRT72L71
DS3 ATM UNI/CLEAR CHANNEL FRAMER
REV. 1.1.0
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REGISTER 76
BIT
FUNCTION
7 Rx LCD
6 RDP Chk Pat
5 RDP Chk Pat En
4 IC Discard
3 SegOAM Pass Through
2 De-Scramble Enable
1 Rx Coset Enable
0 HEC Error Ignore
TABLE 77: RX CP CONFIGURATION REGISTER
RX CP CONFIGURATION REGISTER
HEX ADDRESS: 0X4C
TYPE
RO
DEFAULT
DESCRIPTION-OPERATION
0: Indicates that the Receive Cell Processor currently has cell delineation
within the incoming stream of ATM cells.
1: Indicates that the Receive Cell Processor is currently declaring a “Loss of
1
Cell Delineation”.
NOTE: This bit-field is only active if the XRT72L71 is operating in the “ATM
UNI” Mode.
0: Receive Cell Processor will insert an alternating “Data Path Integrity
Check” value of 0x55 and 0xAA into the 5th octet position of each cell, writ-
ten into the RxFIFO
R/W
0
1: Receive Cell Processor will insert a fixed “Data Path Integrity Check” value
of 0x55 into the 5th octet position of each cell, written into the RxFIFO.
NOTE: This bit-field is only active if the XRT72L71 is operating in the “ATM
UNI” Mode.
0: “Data Path Integrity Check” value is not written into ATM cells. ATM cells
(with their received HEC byte value) are passed on into RxFIFO without
modification.
1:”Data Path Integrity Check” value of 0x55 and 0xAA into the 5th octet posi-
R/W
0
tion of each cell, is written into each ATM cell, which is routed to the
“RxFIFO.
NOTE: This bit-field is only active if the XRT72L71 is operating in the “ATM
UNI” Mode.
0: Idle cells are NOT discarded by the Receive Cell Processor block
1: Idle cells are automatically discarded by the Receive Cell Processor block.
R/W
1
NOTE: This bit-field is only active if the XRT72L71 is operating in the “ATM
UNI” Mode.
0: Segment-Type OAM cells are not written into RxFIFO.
1: Segment-Type OAM cells are passed to receiver FIFO
R/W
1
NOTE: This bit-field is only active if the XRT72L71 is operating in the “ATM
UNI” Mode.
0: Disables cell payload de-scrambling
1: Enables cell payload de-scrambling
R/W
1
NOTE: This bit-field is only active if the XRT72L71 is operating in the “ATM
UNI” Mode.
0: Coset polynomial is not added to the HEC byte of each “incoming” ATM
cell.
1: Coset polynomial is added to HEC byte of each “incoming” ATM Cell. The
R/W
1
Receive Cell Processor needs to account for the Coset polynomial during
HEC byte verification.
NOTE: This bit-field is only active if the XRT72L71 is operating in the “ATM
UNI” Mode.
0: Discards/drops cells with HEC byte errors.
1: Retains cells with HEC byte errors, for further processing.
R/W
0
NOTE: This bit-field is only active if the XRT72L71 is operating in the “ATM
UNI” Mode.
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