XRT72L71 Datasheet, PDF (85/102 Pages) Exar Corporation – DS3 ATM UNI/CLEAR CHANNEL FRAMER

áç
XRT72L71
DS3 ATM UNI/CLEAR CHANNEL FRAMER
REV. 1.1.0
REGISTER 84
BIT
FUNCTION
7-0 Rx Idle Cell Mask 1
TABLE 85: RX CP IDLE CELL MASK HEADER BYTE-1
RX CP IDLE CELL MASK HEADER BYTE-1
HEX ADDRESS: 0X54
TYPE
DEFAULT
DESCRIPTION-OPERATION
This register, along with the “Rx Idle Cell Pattern - 1” Register permits the user to
define “Idle Cell Filtering” criteria for Header byte 1.
Any “1” in this register, configures the Receive Cell Processor to make the compar-
ison between the corresponding bit-field within Header byte 1 and the contents of
the “Rx Idle Cell Pattern - 1” register.
R/W
0xFF _{Any “0” in this register, configures the Receive Cell Processor to NOT perform this}
comparison:
This register should be set to “0xFF” when the Receive Cell Processor is receiving
the “ATM Forum” Standard Idle cells.
NOTE: This register is only active if the XRT72L71 has been configured to operate
in the “ATM UNI” Mode.
REGISTER 85
BIT
FUNCTION
7-0 Rx Idle Cell Mask 2
TABLE 86: RX CP IDLE CELL MASK HEADER BYTE-2
RX CP IDLE CELL MASK HEADER BYTE-2
HEX ADDRESS: 0X55
TYPE
DEFAULT
DESCRIPTION-OPERATION
This register, along with the “Rx Idle Cell Pattern - 2” Register permits the user to
define “Idle Cell Filtering” criteria for Header byte 2.
Any “1” in this register, configures the Receive Cell Processor to make the compar-
ison between the corresponding bit-field within Header byte 2 and the contents of
the “Rx Idle Cell Pattern - 2” register.
R/W
0xFF _{Any “0” in this register, configures the Receive Cell Processor to NOT perform this}
comparison:
This register should be set to “0xFF” when the Receive Cell Processor is receiving
the “ATM Forum” Standard Idle cells.
NOTE: This register is only active if the XRT72L71 has been configured to operate
in the “ATM UNI” Mode.
81