XRT72L71 Datasheet, PDF (21/102 Pages) Exar Corporation – DS3 ATM UNI/CLEAR CHANNEL FRAMER

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PIN DESCRIPTION (CONTINUED)
PIN NO.
108
SYMBOL
TxOHInd/
TxPFrame
TYPE
O
109
TxPOS
O
110
TxPOHFrame
O
111
TxNEG
O
XRT72L71
DS3 ATM UNI/CLEAR CHANNEL FRAMER
REV. 1.1.0
DESCRIPTION
Transmit Overhead Data Indicator/Transmit PLCP Frame Boundary Indi-
cator—Output:
The exact functionality of this output pin depends upon whether the
XRT72L71 Framer IC is operating in the Clear Channel or ATM Uni Mode.
Clear Channel Mode:
In the Clear Channel Mode, this pin serves as the transmit OH Indication for
the external interface. This pin is pulsed for one bit period of DS3 clock to indi-
cate to the external device that the transmit input interface is going to process
OH data at the rising edge of next clock. When the external interface samples
TxOHInd as “High” With the rising edge of DS3 Clk; it is expected NOT to pro-
vide useful payload data bit on TxSer pin. Instead it can provide correspond-
ing OH data bit on TxSer input. However, in that case the user has to program
a register bit to configure XRT72L71 to accept the OH data from the TxSer
input. Otherwise, the OH data will be geaerated internally or be taken from
the TxOH pin if TxOHIns is “High”. This pin is pulsed "High" for one bit period
prior to all DS3 OH bit positions.
ATM UNI Mode:
In ATM UNI mode of operation, this pin functions as Transmit PLCP Frame
signal which pulses "High" once for each outbound PLCP frame, when the last
nibble is being routed.
Transmit Positive Polarity Pulse: The exact role of this output pin depends
upon whether the UNI is operating in the Unipolar or Bipolar Mode.
Unipolar Mode: This output pin functions as the “Single-Rail” output signal for
the “outbound” DS3 data stream. The signal, at this output pin, will be updated
on the “user-selected” edge of the TxLineClk signal.
Bipolar Mode: This output pin functions as one of the two dual rail output sig-
nals that commands the sequence of pulses to be driven on the line. TxNEG
is the other output pin. This input is typically connected to the TPDATA input of
the external DS3 Line Interface Unit IC. When this output is asserted, it will
command the LIU to generate a positive polarity pulse on the line.
Transmit PLCP Frame Path Overhead Byte Serial Input Port—Beginning
of Frame indicator. This output pin, along with the TxPOH, TxPOHClk, and
TxPOHIns pins comprise the “Transmit PLCP Frame POH Byte Insertion”
serial input port. This particular pin will pulse “High” when the “Transmit PLCP
POH Byte Insertion” serial input port is expecting the first bit of the Z6 byte at
the TxPOH input pin.
NOTE: This output pin is only active if the XRT72L71 has been configured to
operate in the “ATM UNI” Mode.
Transmit Negative Polarity Pulse: The exact role of this output pin depends
upon whether the UNI is operating in the Unipolar or Bipolar Mode.
Unipolar Mode: This output signal pulses “High” for one bit period, at the end
of each “outbound” DS3 frame. This output signal is at a logic “Low” for all of
the remaining bit-periods of the “outbound” DS3 frames.
Bipolar Mode: This output pin functions as one of the two dual-rail output sig-
nals that commands the sequence of pulses to be driven on the line. TxPOS is
the other output pin. This input is typically connected to the TNDATA input of
the external DS3 Line Interface Unit IC. When this output is asserted, it will
command the LIU to generate a negative polarity pulse on the line.
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