XRT72L71 Datasheet, PDF (20/102 Pages) Exar Corporation – DS3 ATM UNI/CLEAR CHANNEL FRAMER

XRT72L71
DS3 ATM UNI/CLEAR CHANNEL FRAMER
REV. 1.1.0
PIN DESCRIPTION (CONTINUED)
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PIN NO.
102
SYMBOL
StuffCtl
103
TxInClk
104
RxPLOF
105
GND
106
RxPOOF
107
TxFrameRef
TYPE
I
I
O
***
O
I
DESCRIPTION
External PLCP Frame Stuff Control: This input allows the user to externally
exercise or forego trailer nibble stuffing opportunities by the Transmit PLCP
Processor. PLCP trailer nibble stuff opportunities occur in periods of three
PLCP frames (375µs). The first PLCP frame (first within a “stuff opportunity”
period) will have 13 trailer nibbles appended to it. The second PLCP frame
(second within a “stuff opportunity” period) will have 14 trailer nibbles
appended to it. The third PLCP frame (the location of the stuff opportunity) will
contain 13 trailer nibbles if the StuffCtl input is “Low” and 14 trailer nibbles is
the StuffCtl input is “High”.
NOTE: The user should tie this input pin to “GND” whenever the XRT72L71
has been configured to operate in the “Clear-Channel-Framer” Mode.
Transmit DS3 Framer Block—Clock Signal: The Transmit DS3 Framer can
be configured to use this input signal as the timing reference. If this input pin is
chosen to be the timing reference, then the user must supply a "High" quality
44.736 MHz signal to this input pin. In this configuration, frame generation, by
the Transmit DS3 Framer, will be asynchronous (with any other timing signals
within the UNI). However, frame timing will be based upon this clock signal.
NOTE: This input pin should be tied to “GND” if it is not used as the Transmit
DS3 Framer timing reference.
Receive PLCP—“Loss of Frame” Output Indicator: The Receive PLCP
Processor will assert this pin, when it declares a “Loss of Frame” condition. This
output will be negated when the Receive PLCP Processor reaches the “In
Frame” Condition.
NOTE: This output pin is only active if the user has configured the XRT72L71
to operate in the “ATM UNI” Mode.
Ground Signal Pin
Receive PLCP “Out of Frame” Indicator: The Receive PLCP Processor will
assert this pin, when it declares an “Out of Frame” condition. This output will
be negated when the Receive PLCP Processor reaches the “In Frame” Condi-
tion.
NOTE: This output pin is only active if the user has configured the XRT72L71
to operate in the “ATM UNI” Mode.
Transmit DS3 Framer—Frame Reference Input Pin: The Transmit DS3
Framer can be configured to use this input signal as the “framing” reference for
the Transmit DS3 Framer block. If this input pin is chosen to be the timing ref-
erence, then any rising edge at this input will cause the Transmit DS3 Framer
to begin its creation a new DS3 M-frame. Consequently, the user must supply
a clock signal that is equivalent to the DS3 Frame rate (or 9398.3 Hz). Fur-
ther, the signal which is driving this input pin, must be synchronized witht he
44.736MHz clock signal, which is applied to the “TxInClk” input pin.
NOTE: This input pin should be tied to “GND” if it is not used as the Transmit
DS3 Framer frame reference signal.
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