Z380 Datasheet, PDF (58/115 Pages) Zilog, Inc. – MICROPROCESSOR

ZILOG
8-BIT ARITHMETIC AND LOGICAL GROUP
MICROPROCESSOR
Mnemonic
Symbolic
Operation
Flags
P/
Opcode
# of Execute
S Z x H x V N C 76 543 210 HEX Bytes Time Notes
ADD A,r
ADD A,n
ADD A,(HL)
ADD A,(XY+d)
A←A+r
A←A+n
A ← A + (HL)
A ← A + (XY + d)
¤ ¤ x ¤ x V0¤
¤ ¤ x ¤ x V0¤
¤ ¤ x ¤ x V0¤
¤ ¤ x ¤ x V0¤
10 (000) r
11 (000) 110
← n →
10 (000) 110
11 y11 101
12
22
1 2+r
3 4+r
I
ADD A,XYU
A ← A + XYU
¤ ¤ x ¤ x V0¤
10 (000) 110
← d →
11 y11 101
22
ADD A,XYL
A ← A + XYL
¤ ¤ x ¤ x V0¤
10 (000) 100
11 y11 101
22
ADC A,s
SUB s
SBC A,s
AND s
OR s
XOR s
CP s
A ← A + s + CY
A←A-s
A ← A - s - CY
A ← A AND s
A ← A OR s
A ← A XOR s
A-s
¤ ¤ x ¤ x V0¤
¤ ¤ x ¤ x V1¤
¤ ¤ x ¤ x V1¤
¤ ¤ x 1x P00
¤ ¤ x 0x P00
¤ ¤ x 0x P00
¤ ¤ x ¤ x V1¤
10 (000) 101
(001)
(010)
(011)
(100)
(110)
(101)
(111)
s is any of r, n, XYU, XYL, (HL), (IX+d), (IY+d) as shown for ADD instruction. The indicated bits replace the (000) in the
ADD set above.
INCr
INC (HL)
INC (XY+d)
r←r+1
¤ ¤ x ¤ x V0•
(HL) ← (HL) + 1
¤ ¤ x ¤ x V0•
(XY + d) ← (XY + d) + 1 ¤ ¤ x ¤ x V 0 •
00 r (100)
00 110 (100)
11 y11 101
1 2/3
(5)
1 2+r+w
3 4+r+w I
INC XYU
XYU ← XYU + 1
¤ ¤ x ¤ x V0•
00 110 (100)
← d →
11 y11 101
22
INC XYL
XYL ← XYL + 1
¤ ¤ x ¤ x V0•
00 100 (100)
11 y11 101
22
DEC m
m←m-1
¤ ¤ x ¤ x V1•
00 101 (100)
(101)
m is any of r, XYU, XYL, (HL), (IX+d), (IY+d) as shown for INC instructions. The indicated bits replace (100) with (101) in
operand.
PS010001-0301