Z380 Datasheet, PDF (47/115 Pages) Zilog, Inc. – MICROPROCESSOR

ZILOG
INSTRUCTION SET
MICROPROCESSOR
The Z380 CPU’s instruction set is a superset of the Z80
CPU’s; the Z380 CPU is opcode compatible with the Z80
CPU. Thus a Z80 program can be executed on a Z380
MPU without modification. The instruction set is divided
into seventeen groups by function:
The instructions are divided into the following categories.
s 8-bit load group
s 16/32 bit load group
s Push/Pop group
s Exchanges, block transfers, and searches
s 8-bit arithmetic and logic operations
s General purpose arithmetic and CPU control
s Decoder Directive Instructions
s 16/32 bit arithmetic operations
s Multiply/Divide Instruction group
s 8-bit Rotates and shifts
s 16-bit Rotates and shifts
s 8-bit bit set, reset, and test operations
s Jumps
s Calls, returns, and restarts
s 8-bit input and output operations for External
I/O address space
s 8-bit input and output operations for Internal I/O
address space
s 16-bit input and output operations
Instruction Set
The following is a summary of the Z380 instruction set
which shows the assembly language mnemonic, the op-
eration, the flag status, and gives comments on each
instructions.
The Z380 Technical Manual will contain significantly more
details for programming use. A list of instructions, as well
as encoding is included in Appendix A of this document.
Instruction Set Notation
Symbols. The following symbols are used to describe the
instruction set.
n
nn
d
r
s
dd,qq,ss,tt,uu
xxh
xxl
SR
XY
XYz
XYU
XYL
SP
(C)
cc
[]
()
An 8-bit constant
A 16-bit constant
An 8-bit offset. (2’s complement)
Any one of the CPU register A, B, C, D,
E, H, L
Any 8-bit location for all the addressing
modes allowed for the particular in-
struction.
Any 16-bit location for all the address-
ing modes allowed for the particular
instruction.
MS Byte of the specified 16-bit location
LS Byte of the specified 16-bit location
Select Register
Index register (IX or IY)
Index Register Extend (IXz or IYz)
MS Byte of index register (IXU or IYU)
LS Byte of index register (IXL or IYL)
Current Stack Pointer
I/O Port pointed by C register
Condition Code
Optional field
Indirect Address Pointer or Direct
Address
Note that mnemonic and object code assignment for newly
added instructions (instructions in Italic face) are prelimi-
nary and subject to change without notice.
PS010001-0301