LM3S5P3B Datasheet, PDF (9/1170 Pages) Texas Instruments – Stellaris® LM3S5P3B Microcontroller

Stellaris^® LM3S5P3B Microcontroller
19 Analog Comparators ............................................................................................ 921
19.1 Block Diagram ............................................................................................................ 921
19.2 Signal Description ....................................................................................................... 922
19.3 Functional Description ................................................................................................. 923
19.3.1 Internal Reference Programming .................................................................................. 923
19.4 Initialization and Configuration ..................................................................................... 925
19.5 Register Map .............................................................................................................. 926
19.6 Register Descriptions .................................................................................................. 926
20 Pulse Width Modulator (PWM) ............................................................................ 934
20.1 Block Diagram ............................................................................................................ 935
20.2 Signal Description ....................................................................................................... 936
20.3 Functional Description ................................................................................................. 939
20.3.1 PWM Timer ................................................................................................................. 939
20.3.2 PWM Comparators ...................................................................................................... 939
20.3.3 PWM Signal Generator ................................................................................................ 941
20.3.4 Dead-Band Generator ................................................................................................. 942
20.3.5 Interrupt/ADC-Trigger Selector ..................................................................................... 942
20.3.6 Synchronization Methods ............................................................................................ 942
20.3.7 Fault Conditions .......................................................................................................... 943
20.3.8 Output Control Block ................................................................................................... 944
20.4 Initialization and Configuration ..................................................................................... 945
20.5 Register Map .............................................................................................................. 945
20.6 Register Descriptions .................................................................................................. 948
21 Quadrature Encoder Interface (QEI) ................................................................. 1007
21.1 Block Diagram ........................................................................................................... 1007
21.2 Signal Description ..................................................................................................... 1008
21.3 Functional Description ............................................................................................... 1009
21.4 Initialization and Configuration .................................................................................... 1012
21.5 Register Map ............................................................................................................ 1012
21.6 Register Descriptions ................................................................................................. 1013
22 Pin Diagram ........................................................................................................ 1030
23 Signal Tables ...................................................................................................... 1032
23.1 100-Pin LQFP Package Pin Tables ............................................................................. 1033
23.2 108-Ball BGA Package Pin Tables .............................................................................. 1064
23.3 Connections for Unused Signals ................................................................................. 1096
24 Operating Characteristics ................................................................................. 1098
25 Electrical Characteristics .................................................................................. 1099
25.1 Maximum Ratings ...................................................................................................... 1099
25.2 Recommended Operating Conditions ......................................................................... 1099
25.3 Load Conditions ........................................................................................................ 1100
25.4 JTAG and Boundary Scan .......................................................................................... 1100
25.5 Power and Brown-Out ............................................................................................... 1102
25.6 Reset ........................................................................................................................ 1103
25.7 On-Chip Low Drop-Out (LDO) Regulator ..................................................................... 1104
25.8 Clocks ...................................................................................................................... 1104
25.8.1 PLL Specifications ..................................................................................................... 1104
25.8.2 PIOSC Specifications ................................................................................................ 1105
January 20, 2012
9
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