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LM3S5P3B Datasheet, PDF (3/1170 Pages) Texas Instruments – Stellaris® LM3S5P3B Microcontroller
Stellaris® LM3S5P3B Microcontroller
Table of Contents
Revision History ............................................................................................................................. 33
About This Document .................................................................................................................... 42
Audience .............................................................................................................................................. 42
About This Manual ................................................................................................................................ 42
Related Documents ............................................................................................................................... 42
Documentation Conventions .................................................................................................................. 43
1
1.1
1.2
1.3
1.3.1
1.3.2
1.3.3
1.3.4
1.3.5
1.3.6
1.3.7
1.3.8
1.4
Architectural Overview .......................................................................................... 45
Overview ...................................................................................................................... 45
Target Applications ........................................................................................................ 47
Features ....................................................................................................................... 47
ARM Cortex-M3 Processor Core .................................................................................... 47
On-Chip Memory ........................................................................................................... 49
Serial Communications Peripherals ................................................................................ 50
System Integration ........................................................................................................ 55
Advanced Motion Control ............................................................................................... 61
Analog .......................................................................................................................... 63
JTAG and ARM Serial Wire Debug ................................................................................ 64
Packaging and Temperature .......................................................................................... 65
Hardware Details .......................................................................................................... 65
2
2.1
2.2
2.2.1
2.2.2
2.2.3
2.2.4
2.3
2.3.1
2.3.2
2.3.3
2.3.4
2.3.5
2.3.6
2.4
2.4.1
2.4.2
2.4.3
2.4.4
2.4.5
2.4.6
2.4.7
2.5
2.5.1
2.5.2
2.5.3
The Cortex-M3 Processor ...................................................................................... 66
Block Diagram .............................................................................................................. 67
Overview ...................................................................................................................... 68
System-Level Interface .................................................................................................. 68
Integrated Configurable Debug ...................................................................................... 68
Trace Port Interface Unit (TPIU) ..................................................................................... 69
Cortex-M3 System Component Details ........................................................................... 69
Programming Model ...................................................................................................... 70
Processor Mode and Privilege Levels for Software Execution ........................................... 70
Stacks .......................................................................................................................... 70
Register Map ................................................................................................................ 71
Register Descriptions .................................................................................................... 72
Exceptions and Interrupts .............................................................................................. 85
Data Types ................................................................................................................... 85
Memory Model .............................................................................................................. 85
Memory Regions, Types and Attributes ........................................................................... 87
Memory System Ordering of Memory Accesses .............................................................. 88
Behavior of Memory Accesses ....................................................................................... 88
Software Ordering of Memory Accesses ......................................................................... 88
Bit-Banding ................................................................................................................... 90
Data Storage ................................................................................................................ 92
Synchronization Primitives ............................................................................................. 93
Exception Model ........................................................................................................... 94
Exception States ........................................................................................................... 95
Exception Types ............................................................................................................ 95
Exception Handlers ....................................................................................................... 98
January 20, 2012
3
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