LM3S5P3B Datasheet, PDF (712/1170 Pages) Texas Instruments – Stellaris® LM3S5P3B Microcontroller

Synchronous Serial Interface (SSI)
Bit/Field
0
Name
RORMIS
Type
RO
Reset
0
Description
SSI Receive Overrun Masked Interrupt Status
Value Description
0 An interrupt has not occurred or is masked.
1 An unmasked interrupt was signaled due to the receive FIFO
overflowing.
This bit is cleared when a 1 is written to the RORIC bit in the SSI
Interrupt Clear (SSIICR) register.
712
January 20, 2012
Texas Instruments-Production Data