LM3S5P3B Datasheet, PDF (219/1170 Pages) Texas Instruments – Stellaris® LM3S5P3B Microcontroller

Stellaris^® LM3S5P3B Microcontroller
Bit/Field
12
11
Name
reserved
BYPASS
Type
RO
R/W
Reset
1
1
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
PLL Bypass
Value Description
1 The system clock is derived from the OSC source and divided
by the divisor specified by SYSDIV.
0 The system clock is the PLL output clock divided by the divisor
specified by SYSDIV.
See Table 5-5 on page 198 for programming guidelines.
Note: The ADC must be clocked from the PLL or directly from a
16-MHz clock source to operate properly.
January 20, 2012
219
Texas Instruments-Production Data