LM3S6110 Datasheet, PDF (554/610 Pages) Texas Instruments – Stellaris® LM3S6110 Microcontroller

Signal Tables
Table 16-6. Signals by Signal Name (continued)
Pin Name
Pin Number Pin Type Buffer Type^a Description
GND
B6
-
Power Ground reference for logic and I/O pins.
C4
C5
F10
F11
F12
H3
J3
J10
K5
K6
K10
L10
GNDA
A5
-
Power The ground reference for the analog circuits ( Analog
B5
Comparators, etc.). These are separated from GND to
minimize the electrical noise contained on VDD from affecting
the analog functions.
GNDPHY
C8
-
Power GND of the Ethernet PHY.
C9
K4
LDO
E3
-
Power Low drop-out regulator output voltage. This pin requires an
external capacitor between the pin and GND of 1 µF or
greater. The LDO pin must also be connected to the VDD25
pins at the board level in addition to the decoupling
capacitor(s).
LED0
J12
O
TTL
Ethernet LED 0.
LED1
J11
O
TTL
Ethernet LED 1.
MDIO
L9
I/O
TTL
MDIO of the Ethernet PHY.
NC
A1
-
-
No connect. Leave the pin electrically unconnected/isolated.
A2
A3
A4
A11
A12
B1
B2
B3
B4
B11
B12
C1
C2
D1
D2
K1
K2
K11
K12
M6
M10
M12
OSC0
L11
I
Analog Main oscillator crystal input or an external clock reference
input.
OSC1
M11
O
Analog Main oscillator crystal output. Leave unconnected when using
a single-ended clock source.
554
June 18, 2012
Texas Instruments-Production Data