LM3S6110 Datasheet, PDF (541/610 Pages) Texas Instruments – Stellaris® LM3S6110 Microcontroller

Stellaris^® LM3S6110 Microcontroller
Table 16-1. Signals by Pin Number (continued)
Pin Number
Pin Name
Pin Type Buffer Type^a Description
PC3
I/O
TTL
GPIO port C bit 3.
77
SWO
O
TTL
JTAG TDO and SWO.
TDO
O
TTL
JTAG TDO and SWO.
PC2
I/O
TTL
GPIO port C bit 2.
78
TDI
I
TTL
JTAG TDI.
PC1
I/O
TTL
GPIO port C bit 1.
79
SWDIO
I/O
TTL
JTAG TMS and SWDIO.
TMS
I/O
TTL
JTAG TMS and SWDIO.
PC0
I/O
TTL
GPIO port C bit 0.
80
SWCLK
I
TTL
JTAG/SWD CLK.
TCK
I
TTL
JTAG/SWD CLK.
81
VDD
-
Power Positive supply for I/O and some logic.
82
GND
-
Power Ground reference for logic and I/O pins.
83
VCCPHY
-
Power VCC of the Ethernet PHY.
84
VCCPHY
-
Power VCC of the Ethernet PHY.
85
GNDPHY
-
Power GND of the Ethernet PHY.
86
GNDPHY
-
Power GND of the Ethernet PHY.
87
GND
-
Power Ground reference for logic and I/O pins.
88
VDD25
-
Power Positive supply for most of the logic function, including the
processor core and most peripherals.
PB7
I/O
TTL
GPIO port B bit 7.
89
TRST
I
TTL
JTAG TRST.
PB6
I/O
TTL
GPIO port B bit 6.
90
C0+
I
Analog Analog comparator 0 positive input.
PB5
I/O
TTL
GPIO port B bit 5.
91
C1-
I
Analog Analog comparator 1 negative input.
PB4
I/O
TTL
GPIO port B bit 4.
92
C0-
I
Analog Analog comparator 0 negative input.
93
VDD
-
Power Positive supply for I/O and some logic.
94
GND
-
Power Ground reference for logic and I/O pins.
PD4
I/O
TTL
GPIO port D bit 4.
95
CCP3
I/O
TTL
Capture/Compare/PWM 3.
96
PD5
I/O
TTL
GPIO port D bit 5.
GNDA
97
-
Power The ground reference for the analog circuits ( Analog Comparators,
etc.). These are separated from GND to minimize the electrical
noise contained on VDD from affecting the analog functions.
VDDA
98
-
Power The positive supply for the analog circuits (ADC, Analog
Comparators, etc.). These are separated from VDD to minimize
the electrical noise contained on VDD from affecting the analog
functions. VDDA pins must be supplied with a voltage that meets
the specification in “Recommended DC Operating
Conditions” on page 563, regardless of system implementation.
99
PD6
I/O
TTL
GPIO port D bit 6.
June 18, 2012
541
Texas Instruments-Production Data