LM3S6110 Datasheet, PDF (449/610 Pages) Texas Instruments – Stellaris® LM3S6110 Microcontroller

Stellaris^® LM3S6110 Microcontroller
Table 12-4. Ethernet Register Map (continued)
Offset Name
Type
Reset
0x024 MACMDV
0x02C MACMTXD
0x030 MACMRXD
0x034 MACNP
0x038 MACTR
MII Management
-
MR0
-
MR1
-
MR2
R/W
0x0000.0080
R/W
0x0000.0000
R/W
0x0000.0000
RO
0x0000.0000
R/W
0x0000.0000
R/W
0x3100
RO
0x7849
RO
0x000E
-
MR3
RO
0x7237
-
MR4
R/W
0x01E1
-
MR5
RO
0x0000
-
MR6
RO
0x0000
-
MR16
R/W
0x0140
-
MR17
-
MR18
-
MR19
R/W
0x0000
RO
0x0000
R/W
0x4000
-
MR23
R/W
0x0010
-
MR24
R/W
0x00C0
Description
Ethernet MAC Management Divider
Ethernet MAC Management Transmit Data
Ethernet MAC Management Receive Data
Ethernet MAC Number of Packets
Ethernet MAC Transmission Request
See
page
463
464
465
466
467
Ethernet PHY Management Register 0 – Control
468
Ethernet PHY Management Register 1 – Status
470
Ethernet PHY Management Register 2 – PHY Identifier
1
472
Ethernet PHY Management Register 3 – PHY Identifier
2
473
Ethernet PHY Management Register 4 – Auto-Negotiation
Advertisement
474
Ethernet PHY Management Register 5 – Auto-Negotiation
Link Partner Base Page Ability
476
Ethernet PHY Management Register 6 – Auto-Negotiation
Expansion
477
Ethernet PHY Management Register 16 –
Vendor-Specific
478
Ethernet PHY Management Register 17 – Interrupt
Control/Status
480
Ethernet PHY Management Register 18 – Diagnostic
482
Ethernet PHY Management Register 19 – Transceiver
Control
483
Ethernet PHY Management Register 23 – LED
Configuration
484
Ethernet PHY Management Register 24 –MDI/MDIX
Control
485
12.6
Ethernet MAC Register Descriptions
The remainder of this section lists and describes the Ethernet MAC registers, in numerical order by
address offset. Also see “MII Management Register Descriptions” on page 467.
June 18, 2012
449
Texas Instruments-Production Data