LM3S6110 Datasheet, PDF (260/610 Pages) Texas Instruments – Stellaris® LM3S6110 Microcontroller

General-Purpose Input/Outputs (GPIOs)
7.3 Initialization and Configuration
To use the GPIO, the peripheral clock must be enabled by setting the appropriate GPIO Port bit
field (GPIOn) in the RCGC2 register.
On reset, all GPIO pins (except for the five JTAG pins) are configured out of reset to be undriven
(tristate): GPIOAFSEL=0, GPIODEN=0, GPIOPDR=0, and GPIOPUR=0. Table 7-6 on page 260
shows all possible configurations of the GPIO pads and the control register settings required to
achieve them. Table 7-7 on page 260 shows how a rising edge interrupt would be configured for pin
2 of a GPIO port.
Table 7-6. GPIO Pad Configuration Examples
Configuration
Digital Input (GPIO)
GPIO Register Bit Value^a
AFSEL DIR
ODR
0
0
0
DEN
1
Digital Output (GPIO)
0
1
0
1
Open Drain Output
0
1
1
1
(GPIO)
Digital Input (Timer
1
X
0
1
CCP)
Digital Output (PWM)
1
X
0
1
Digital Output (Timer
1
X
0
1
PWM)
Digital Input/Output
1
X
0
1
(SSI)
Digital Input/Output
1
X
0
1
(UART)
Analog Input
(Comparator)
0
0
0
0
Digital Output
(Comparator)
1
X
0
1
a. X=Ignored (don’t care bit)
?=Can be either 0 or 1, depending on the configuration
PUR
?
?
X
?
?
?
?
?
0
?
PDR
?
?
X
?
?
?
?
?
0
?
DR2R
X
?
?
X
?
?
?
?
X
?
DR4R
X
?
?
X
?
?
?
?
X
?
DR8R
X
?
?
X
?
?
?
?
X
?
SLR
X
?
?
X
?
?
?
?
X
?
Table 7-7. GPIO Interrupt Configuration Example
Desired
Pin 2 Bit Value^a
Register
Interrupt
Event
7
6
5
4
Trigger
GPIOIS
0=edge
X
X
X
X
1=level
GPIOIBE
0=single
X
X
X
X
edge
1=both
edges
GPIOIEV 0=Low level,
X
X
X
X
or negative
edge
1=High level,
or positive
edge
3
X
X
X
2
0
0
1
1
X
X
X
0
X
X
X
260
June 18, 2012
Texas Instruments-Production Data