LM3S6110 Datasheet, PDF (542/610 Pages) Texas Instruments – Stellaris® LM3S6110 Microcontroller

Signal Tables
Table 16-1. Signals by Pin Number (continued)
Pin Number
Pin Name
Pin Type Buffer Type^a Description
PD7
100
C0o
I/O
TTL
GPIO port D bit 7.
O
TTL
Analog comparator 0 output.
a. The TTL designation indicates the pin has TTL-compatible voltage levels.
16.1.2 Signals by Signal Name
Table 16-2. Signals by Signal Name
Pin Name
C0+
C0-
C0o
C1+
C1-
C2+
C2-
CCP0
CCP1
CCP2
CCP3
CMOD0
Pin Number
90
92
100
24
91
23
22
66
34
67
95
65
Pin Type
I
I
O
I
I
I
I
I/O
I/O
I/O
I/O
I
CMOD1
76
I
ERBIAS
41
I
Fault
GND
GNDA
71
I
9
-
15
21
33
39
45
54
57
63
69
82
87
94
4
-
97
GNDPHY
42
-
85
86
Buffer Type^a Description
Analog Analog comparator 0 positive input.
Analog Analog comparator 0 negative input.
TTL
Analog comparator 0 output.
Analog Analog comparator 1 positive input.
Analog Analog comparator 1 negative input.
Analog Analog comparator 2 positive input.
Analog Analog comparator 2 negative input.
TTL
Capture/Compare/PWM 0.
TTL
Capture/Compare/PWM 1.
TTL
Capture/Compare/PWM 2.
TTL
Capture/Compare/PWM 3.
TTL
CPU Mode bit 0. Input must be set to logic 0 (grounded); other
encodings reserved.
TTL
CPU Mode bit 1. Input must be set to logic 0 (grounded); other
encodings reserved.
Analog
12.4-kΩ resistor (1% precision) used internally for Ethernet
PHY.
TTL
PWM Fault.
Power Ground reference for logic and I/O pins.
Power
Power
The ground reference for the analog circuits ( Analog
Comparators, etc.). These are separated from GND to
minimize the electrical noise contained on VDD from affecting
the analog functions.
GND of the Ethernet PHY.
542
June 18, 2012
Texas Instruments-Production Data