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LM3S6110 Datasheet, PDF (553/610 Pages) Texas Instruments – Stellaris® LM3S6110 Microcontroller
Stellaris® LM3S6110 Microcontroller
Table 16-5. Signals by Pin Number (continued)
Pin Number
Pin Name
Pin Type Buffer Typea Description
PA2
I/O
TTL
GPIO port A bit 2.
M4
SSI0Clk
I/O
TTL
SSI module 0 clock
PA5
I/O
TTL
GPIO port A bit 5.
M5
SSI0Tx
O
TTL
SSI module 0 transmit
M6
NC
-
-
No connect. Leave the pin electrically unconnected/isolated.
M7
RXIP
I
Analog RXIP of the Ethernet PHY.
M8
TXOP
O
Analog TXOP of the Ethernet PHY.
M9
PF0
I/O
TTL
GPIO port F bit 0.
M10
NC
-
-
No connect. Leave the pin electrically unconnected/isolated.
M11
OSC1
O
Analog Main oscillator crystal output. Leave unconnected when using a
single-ended clock source.
M12
NC
-
-
No connect. Leave the pin electrically unconnected/isolated.
a. The TTL designation indicates the pin has TTL-compatible voltage levels.
16.2.2 Signals by Signal Name
Table 16-6. Signals by Signal Name
Pin Name
C0+
C0-
C0o
C1+
C1-
C2+
C2-
CCP0
CCP1
CCP2
CCP3
CMOD0
Pin Number
A7
A6
F1
M1
B7
M2
L2
E12
L6
D12
E1
E11
Pin Type
I
I
O
I
I
I
I
I/O
I/O
I/O
I/O
I
CMOD1
B10
I
ERBIAS
K3
I
Fault
C12
I
Buffer Typea Description
Analog Analog comparator 0 positive input.
Analog Analog comparator 0 negative input.
TTL
Analog comparator 0 output.
Analog Analog comparator 1 positive input.
Analog Analog comparator 1 negative input.
Analog Analog comparator 2 positive input.
Analog Analog comparator 2 negative input.
TTL
Capture/Compare/PWM 0.
TTL
Capture/Compare/PWM 1.
TTL
Capture/Compare/PWM 2.
TTL
Capture/Compare/PWM 3.
TTL
CPU Mode bit 0. Input must be set to logic 0 (grounded); other
encodings reserved.
TTL
CPU Mode bit 1. Input must be set to logic 0 (grounded); other
encodings reserved.
Analog
12.4-kΩ resistor (1% precision) used internally for Ethernet
PHY.
TTL
PWM Fault.
June 18, 2012
553
Texas Instruments-Production Data