LM3S6110 Datasheet, PDF (540/610 Pages) Texas Instruments – Stellaris® LM3S6110 Microcontroller

Signal Tables
Table 16-1. Signals by Pin Number (continued)
Pin Number
Pin Name
Pin Type Buffer Type^a Description
43
TXOP
O
Analog TXOP of the Ethernet PHY.
44
VDD
-
Power Positive supply for I/O and some logic.
45
GND
-
Power Ground reference for logic and I/O pins.
46
TXON
O
Analog TXON of the Ethernet PHY.
47
PF0
I/O
TTL
GPIO port F bit 0.
48
OSC0
I
Analog Main oscillator crystal input or an external clock reference input.
49
OSC1
O
Analog Main oscillator crystal output. Leave unconnected when using a
single-ended clock source.
50
NC
-
-
No connect. Leave the pin electrically unconnected/isolated.
51
NC
-
-
No connect. Leave the pin electrically unconnected/isolated.
52
NC
-
-
No connect. Leave the pin electrically unconnected/isolated.
53
NC
-
-
No connect. Leave the pin electrically unconnected/isolated.
54
GND
-
Power Ground reference for logic and I/O pins.
55
VDD
-
Power Positive supply for I/O and some logic.
56
VDD
-
Power Positive supply for I/O and some logic.
57
GND
-
Power Ground reference for logic and I/O pins.
58
MDIO
I/O
TTL
MDIO of the Ethernet PHY.
PF3
I/O
TTL
GPIO port F bit 3.
59
LED0
O
TTL
Ethernet LED 0.
PF2
I/O
TTL
GPIO port F bit 2.
60
LED1
O
TTL
Ethernet LED 1.
61
PF1
I/O
TTL
GPIO port F bit 1.
62
VDD25
-
Power Positive supply for most of the logic function, including the
processor core and most peripherals.
63
GND
-
Power Ground reference for logic and I/O pins.
64
RST
I
TTL
System reset input.
65
CMOD0
I
TTL
CPU Mode bit 0. Input must be set to logic 0 (grounded); other
encodings reserved.
PB0
I/O
TTL
GPIO port B bit 0.
66
CCP0
I/O
TTL
Capture/Compare/PWM 0.
PB1
I/O
TTL
GPIO port B bit 1.
67
CCP2
I/O
TTL
Capture/Compare/PWM 2.
68
VDD
-
Power Positive supply for I/O and some logic.
69
GND
-
Power Ground reference for logic and I/O pins.
70
PB2
I/O
TTL
GPIO port B bit 2.
PB3
I/O
TTL
GPIO port B bit 3.
71
Fault
I
TTL
PWM Fault.
72
NC
-
-
No connect. Leave the pin electrically unconnected/isolated.
73
NC
-
-
No connect. Leave the pin electrically unconnected/isolated.
74
NC
-
-
No connect. Leave the pin electrically unconnected/isolated.
75
NC
-
-
No connect. Leave the pin electrically unconnected/isolated.
76
CMOD1
I
TTL
CPU Mode bit 1. Input must be set to logic 0 (grounded); other
encodings reserved.
540
June 18, 2012
Texas Instruments-Production Data