STE10A Datasheet, PDF (10/82 Pages) STMicroelectronics – PCI 10/100 Ethernet controller with integrated PHY (3.3V)

Pin description
STE10/100A
Table 1.
Pin no.
Pin description (continued)
Name
Type
Description
Physical interface
98
X1
I
97
X2
O
107,109 TX+, TX-
O
105,104 RX+, RX-
I
101
Iref
O
LED display & miscellaneous
LED M1-
LK/Act
90
or
O
LED M2-
Act
LED M1-
Speed
92
or
O
LED M2-
100 link
25MHz reference clock input for physical portion. When an
external 25MHz crystal is used, this pin will be connected to
one of its terminals, and X2 will be connected to the other
terminal. If an external 25 MHz oscillator is used, then this
pin will be connected to the oscillator’s output pin.
25MHz reference clock output for physical portion. When an
external 25MHz crystal is used, this pin will be connected to
one of the crystal terminals (see X1, above). If an external
clock source is used, then this pin should be left open.
The differential transmit outputs of 100BASE-TX or 10BASE-
T, these pins connect directly to magnetic.
The differential receive inputs of 100BASE-TX or 10BASE-T,
these pins connect directly from magnetic.
Reference resistor connecting pin for reference current,
directly connects a 5KOhm ± 1% resistor to Vss.
This pin can be programmed as mode 1 or mode 2:
For mode 1:
LED display for link and activity status. This pin will be driven
on continually when a good Link test is detected. This pin will
be driven at a 10Hz blinking frequency when either effective
receiving or transmitting is detected.
For mode 2:
LED display for activity status. This pin will be driven at a
10Hz blinking frequency when either effective receiving or
transmitting is detected.
This pin can be programmed as mode 1 or mode 2:
For mode 1:
LED display for 100M b/s or 10M b/s speed. This pin will be
driven on continually when the 100M b/s network operating
speed is detected.
For mode 2:
LED display for 100Ms/s link status. This pin will be driven on
continually when 100Mb/s network operating speed is
detected.
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