COM90C66 Datasheet, PDF (73/76 Pages) SMSC Corporation – ARCNET Controller/Transceiver with AT Interface and On-Chip RAM

AEN
A0-A15,
nSBHE
BALE
nIOR
D0-D7 or
D0-D15
nTOPH,
nTOPL
nIOCS16
Modified Version of Page 52 for Rev. D COM90C66 Only.
VALID
t1
t2
t3
t6
t4
t5
t10
t9
**
t8
VALID DATA
t7
Parameter
t1
Address, nSBHE Set Up to BALE Low *
t2
Address, nSBHE Hold after BALE Low *
t3
Address, nSBHE, AEN Set Up to nIOR Low
t4
nIOR Low to Valid Data
t5
nIOR Low to nTOPH, nTOPL Low
t6
A2-A15 Valid, AEN Low to nIOCS16 Low
t7
nIOR High to nTOPH, nTOPL High
t8
nIOR High to Data High Impedance
t9
nIOR High to BALE High (Next Address)
t10 AEN Hold after nIOR High
min
typ max units
20
nS
20
nS
25
nS
80 nS
0
30 nS
0
25 nS
0
15 nS
0
20 nS
30
nS
10
nS
* For latched addresses, t1 and t2 do not apply. Please refer to Figure 21 for Latched Address
Mode.
** 130 nS minimum inactive time on consecutive reads from Data Register of the COM90C66.
FIGURE 17 - READ I/O CYCLE
73