COM90C66 Datasheet, PDF (13/76 Pages) SMSC Corporation – ARCNET Controller/Transceiver with AT Interface and On-Chip RAM

TRANSMISSION MEDIA INTERFACE
The right half of Figure 2 illustrates the
COM90C66 interface to the transmission media
used to connect the node to the network. The
HYC9058/68/88 may be used to drive the
media. During transmission, the COM90C66
transmits a logic "1" by generating two 100 nS
non-overlapping negative pulses, nPULSE1 and
nPULSE2. These signals are sent to the LAN
Driver, which in turn creates a 200 nS dipulse
signal on the media. A logic "0" is transmitted
by the absence of the two negative pulses, that
is, the nPULSE1 and nPULSE2 outputs remain
high, therefore there is an absence of a dipulse.
During reception the 200 nS dipulse appearing
on the media is coupled through the RF
transformer of the LAN Driver. A positive pulse
at the RXIN pin of the COM90C66 is interpreted
as a logic "1". Again, if no dipulse is present,
the COM90C66 interprets a logic "0".
Typically, RXIN pulse occur at multiples of 400
nS. The COM90C66 can tolerate distortion of
plus or minus 100 nS and still correctly capture
the RXIN pulses.
During Reset, the transmitter portion of the
COM90C66 is disabled and the nPULSE1 and
nPULSE2 pins are inactive high.
The COM90C66 includes the nTXLED and
nBSLED signals which, when tied to LEDs,
provide indication of transmit and board access
activity. In addition, it is possible for the user to
completely disable the transmitter through
software. These two unique features represent
two of the improvements made in the
diagnostics of the device. Please see the
Improved Diagnostics section of this document
for further detail.
FUNCTIONAL DESCRIPTION
MICROSEQUENCER
The COM90C66 contains an internal
microsequencer which performs all of the
control operation necessary to carry out the
ARCNET protocol. It consists of a clock
generator, a 554 x 8 ROM, a program counter,
two instruction registers, an instruction decoder,
a no-op generator, jump logic, and
reconfiguration logic.
The COM90C66 derives a 5 MHz and a 2.5 MHz
clock from the external crystal. These clocks
provide the rate at which the instructions are
executed within the COM90C66. The 5 MHz
clock is the rate at which the program counter
operates, while the 2.5 MHz clock is the rate at
which the instructions are executed. The
microprogram is stored in the ROM and the
instructions are fetched and then placed into the
instruction registers. One register holds the op
code, while the other holds the immediate data.
Once the instruction is fetched, it is decoded
by the internal instruction decoder, at which
point the COM90C66 proceeds to execute the
instruction. When a no-op instruction is
encountered, the microsequencer enters a timed
loop, in which case the program counter is
temporarily stopped until the loop is complete.
When a jump instruction is encountered, the
program counter is loaded with the jump
address from the ROM. The COM90C66
contains an internal reconfiguration timer which
interrupts the microsequencer if it has timed out.
At this point the program counter is cleared,
after which the MYRECON bit of the Diagnostic
Status Register is set.
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