COM90C66 Datasheet, PDF (55/76 Pages) SMSC Corporation – ARCNET Controller/Transceiver with AT Interface and On-Chip RAM

AEN
t9
A0-A15
VALID
t2
t7
BALE
t1
nIOW
t3
t8
nPROM **
t4
IOCHRDY
t5
t6
Parameter
min
typ max units
t1 Address Set Up to BALE Low *
20
t2 Address Hold after BALE Low *
20
t3 Address, AEN Set Up to nIOW Low
50
t4 nIOW Low To nPROM Low
0
t5 nIOW Low to IOCHRDY Low
0
t6 IOCHRDY Low Pulse Width
100
t7 nIOW High to BALE High (Next Address)
30
t8 nIOW High to nPROM HIgh
0
t9 AEN Hold after nIOW High
10
nS
nS
nS
25 nS
20 nS
165 nS
nS
30 nS
nS
* For latched addresses, t1 and t2 do not apply. Please refer to Figure 21 for Latched Address
Mode.
** The external latch should use nPROM as nCS input and nIOW as CLK input.
FIGURE 20 - WRITE EXTERNAL REGISTER CYCLE
55