COM90C66 Datasheet, PDF (53/76 Pages) SMSC Corporation – ARCNET Controller/Transceiver with AT Interface and On-Chip RAM

AEN
A0-A15,
nSBHE
BALE
nIOW
D0-D7 or
D0-D15
nTOPH
nTOPL
nIOCS16
VALID
t2
t1
t3
t5
t8
t7
t4
**
t6
VALID DATA
Parameter
t1 Address, nSBHE Set Up to BALE Low *
t2 Address, nSBHE Hold after BALE Low *
t3 Address, nSBHE, AEN Set Up to nIOW Low
t4 Valid Data Set Up to nIOW High
t5 A2-A15, AEN Low, BALE High to nIOCS16 Low
t6 Data Hold Time from nIOW High
t7 nIOW High to BALE High (Next Address)
t8 AEN Hold after nIOW High
min
typ max units
20
nS
20
nS
25
nS
30
nS
0
25
nS
9
nS
30
nS
10
nS
* For latched address, t1 and t2 do not apply. Please refer to Figure 21 for Latched Addresss
Mode.
** 200 nS minimum inactive time on consecutive writes to the Data Register of the COM90C66.
FIGURE 18 - WRITE I/O CYCLE
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