COM90C66 Datasheet, PDF (15/76 Pages) SMSC Corporation – ARCNET Controller/Transceiver with AT Interface and On-Chip RAM

IOS0-2
MS0-4
A0-A19
nENROM
nPROM
AEN
BALE
nTOPL
nTOPH
D0-D15
ADDRESS
DECODING
CIRCUITRY
1K x
RAM8
1K x
RAM8
ADDITIONAL
REGISTERS
INTR
RESET IN
nMEMR
nMEMW
nIOR
nIOW
nMEMCS16
nIOCS16
IOCHRDY
nSBHE
nOWS
STATUS/
COMMAND
REGISTER
RESET
LOGIC
MICRO-
SEQUENCER
AND
WORKING
REGISTERS
I/O CHANNEL
READY
AND BUS
ARBITRATION
CIRCUITRY
RECONFIGURATION
TIMER
TX/RX
LOGIC
OSCILLATOR
NODE ID
LOGIC
nPULSE1
nPULSE2
nRXIN
nTXLED
nBSLED
XTAL1
XTAL2
CLK
CACLK
NID0-7
FIGURE 3 - INTERNAL BLOCK DIAGRAM
15